zl2006 Intersil Corporation, zl2006 Datasheet - Page 34

• Manufacturer Part Number: zl2006
• Description: Adaptive Digital Dc-dc Controller With Drivers And Current Sharing
• Manufacturer: Intersil Corporation

The ZL2006’s output will be forced higher than its
nominal set point when the MGN command is set
HIGH, and the output will be forced lower than its
nominal set point when the MGN command is set
LOW. Default margin limits of V
loaded in the factory, but the margin limits can be
modified through the I
as V
nominal output voltage set point determined by the V0
and V1 pins. A safety feature prevents the user from
configuring the output voltage to exceed V
under any conditions.
The margin limits and the MGN command can both be
set individually through the I
Additionally, the transition rate between the nominal
output voltage and either margin limit can be
configured through the I
Application Note AN33 for detailed instructions on
modifying the margining configurations.
6.8 I
The ZL2006 provides an I
that enables the user to configure all aspects of the
device operation as well as monitor the input and
output parameters. The ZL2006 can be used with any
standard 2-wire I
is compatible with SMBus version 2.0 and includes an
SALRT line to help mitigate bandwidth limitations
related to continuous fault monitoring. Pull-up resistors
are required on the I
SMBus 2.0 specification. The ZL2006 accepts most
standard PMBus commands. When controlling the
device with PMBus commands, it is recommended that
the enable pin is tied to SGND.
2
NOM
C/SMBus Communications
+ 10% or as low as 0V, where V
2
C host device. In addition, the device
34
2
2
C/SMBus as specified in the
C/SMBus interface to as high
2
C interface. Please refer to
2
C/SMBus digital interface
2
C/SMBus interface.
NOM
±5% are pre-
NOM
NOM
+ 10%
is the
ZL2006
6.9 I
When communicating with multiple SMBus devices
using the I
its own unique address so the host can distinguish
between the devices. The device address can be set
according to the pin-strap options listed in Table 26.
Address values are right-justified.
Table 26. SMBus Device Address Selection
If additional device addresses are required, a resistor
can be connected to the SA0 pin according to Table 27
to provide up to 25 unique device addresses. In this
case, the SA1 pin should be tied to SGND.
Table 27. SMBus Address Values
If more than 25 unique device addresses are required or
if other SMBus address values are desired, both the
SA0 and SA1 pins can be configured with a resistor to
SGND according to the following equation and Table
28.
SA1
SMBus address = 25 x (SA1 index) + (SA0 index)
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
31.6 kΩ
10 kΩ
11 kΩ
(in decimal)
2
R
C/SMBus Device Address Selection
SA
2
OPEN
HIGH
C/SMBus interface, each device must have
LOW
Address
SMBus
0x0A
0x0B
0x0C
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
LOW
0x20
0x23
0x26
34.8 kΩ
38.3 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
90.9 kΩ
100 kΩ
OPEN
75 kΩ
0x21
0x24
0x27
R
SA0
December 15, 2010
SA
Reserved
Address
SMBus
FN6850.1
HIGH
0x22
0x25
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18