zl2006 Intersil Corporation, zl2006 Datasheet - Page 9

• Manufacturer Part Number: zl2006
• Description: Adaptive Digital Dc-dc Controller With Drivers And Current Sharing
• Manufacturer: Intersil Corporation

3. Typical Application Circuit
The following application circuit represents a typical implementation of the ZL2006. For PMBus operation, it is
recommended to tie the enable pin (EN) to SGND.
V25
Notes:
1. Ferrite bead is optional for input noise suppression
2. The I
3. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number of devices
connected). The 10 k default value, assuming a maximum of 100 pF per device, provides the necessary 1 µs pull-up rise time. Please refer to the
DDC Bus section for more details.
POWER GOOD OUTPUT
I
2
C/SMBus
2
C/SMBus requires pull-up resistors. Please refer to the I
2
ENABLE
9
1
2
3
4
5
6
7
8
9
DGND
SYNC
SA0
SA1
ILIM0
ILIM1
SCL
SDA
SALRT
ZL2006
Figure 4. 12 V to 1.8 V / 20 A Application Circuit
(4.5 V UVLO, 10 ms SS delay, 5 ms SS ramp)
DDC Bus
3
ISENA
ISENB
PGND
C
VDD
BST
EPAD
V25
GH
SW
GL
VR
2
C/SMBus specifications for more details.
27
26
25
24
23
22
21
20
19
10 µF
4 V
ZL2006
BAT54
DB
4.7 µF
4.7 µF
25 V
F.B.
C
CB
VR
1
6.3 V
1 µF
16 V
V
QH
QL
Ground unification
IN
2 x 47 µF
2.2 µH
6.3 V
C
L
12V
OUT
OUT
3 x 10 µF
25 V
C
IN
POS-CAP
470 µF
2.5 V
December 15, 2010
2*220 µF
6.3 V
100 m
FN6850.1
V
RTN
OUT