ox16cf950 ETC-unknow, ox16cf950 Datasheet - Page 40

• Manufacturer Part Number: ox16cf950
• Description: Cost Asynchronous Card
• Manufacturer: ETC-unknow

Designers have the option of using either TTL clock
modules or crystal oscillator circuits for system clock input,
with minimal additional components. The following two
sections describe how each can be connected.
6.10.5 TTL Clock Module
Using a TTL module for the system clock simply requires
the module to be supplied with +5v power and GND
connections. The clock output can then be connected
directly to XTLI. XTLO should be left unconnected.
6.10.6 External 1x Clock Mode
The transmitter and receiver can accept an external clock
applied to the RI# and DSR# pins respectively. The clock
options are selected using the clock select register (CKS -
see section 6.11.8). The transmitter and receiver may be
configured to operate in 1x (Isochronous) mode by setting
CKS[7] and CKS[3], respectively. In Isochronous mode,
transmitter or receiver will use the 1x clock (usually but not
necessarily an external source) where asynchronous
framing is maintained using start, parity and stop-bits.
However serial transmission and reception is synchronised
to the 1x clock. In this mode asynchronous data may be
transmitted at baud rates up to 60Mbps. The local 1x clock
source can be asserted on the DTR# pin.
6.11 Additional Features
6.11.1 Additional Status Register ‘ASR’
ASR[0]: Transmitter disabled
logic 0
logic 1
This bit i s cleared after a hardware reset or channel
software reset. The software driver may write a 0 to this bit
to re-enable the transmitter if it was disabled by in-band
flow control. Writing a 1 to this bit has no effect.
ASR[1]: Remote transmitter disabled
logic 0
OXFORD SEMICONDUCTOR LTD.
Figure 5: TTL Clock Module Connectivity
The transmitter is not disabled by in-band flow
control.
The receiver has detected an XOFF, and has
disabled the transmitter.
The remote transmitter is not disabled by in-
band flow control.
CLOCK
VDD
XTLI
Note that line drivers need to be capable of transmission at
data rates twice the system clock used (as one cycle of the
system clock corresponds to 1 bit of serial data). Also note
that enabling modem interrupts is illegal in isochronous
mode, as the clock signal will cause a continuous change
to the modem status (unless masked in MDM register, see
section 6.11.10).
6.10.7 Crystal Oscillator Circuit
The OXCF950 may be clocked by a crystal connected to
XTLI and XTLO or directly from a clock source connected
to the XTLI pin. The circuit required to use the on- chip
oscillator is shown opposite.
Note:
logic 1
This bit is cleared after a hardware reset or chann el
software reset. The software driver may write a 0 to this bit
to re-enable the remote transmitter (an XON is
transmitted). Writing a 1 to this bit has no effect.
Note : The remaining bits (ASR[7:2]) of this register are read only
ASR[2]: RTS
This is t h e complement of the actual state of the RTS# pin
when the device is not in loopback mode. The driver
software can determine if the remote transmitter is disabled
by RTS# out-of-band flow control by reading this bit. In
Frequency
1.8432 – 8
Range
(MHz)
8-60
XTLO
XTLI
For better stability use a smaller value of R
R
The total capacitive load (C1 in series with C2) should
be that specified by the crystal manufacturer (nominally
16pF)
1
Figure 6: Crystal Oscillator Circuit
The transmitter has sent an XOFF character,
to disable the remote transmitter. (Cleared
when a subsequent XON is sent).
to reduce power consumption.
Table 36: Component Values
C1 (pF)
33-68
68
OXCF950 DATA SHEET V1.1
R
C2 (pF)
33 – 68
1
22
R
2
220K -2M2
R1 ( )
220K
C
C
Page 40
2
1
1
. Increase
R2 ( )
470R
470R