gs840e32agt-180i GSI Technology, gs840e32agt-180i Datasheet - Page 14
![no-image](/images/manufacturer_photos/0/2/286/gsi_technology_sml.jpg)
gs840e32agt-180i
Manufacturer Part Number
gs840e32agt-180i
Description
256k X 18, 128k X 32, 128k X 36 4mb Sync Burst Srams
Manufacturer
GSI Technology
Datasheet
1.GS840E32AGT-180I.pdf
(32 pages)
- Current page: 14 of 32
- Download datasheet (951Kb)
Notes:
1.
2.
3.
Rev: 1.14 10/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied Low.
The upper portion of the diagram assumes active use of only the Enable (E
and that ADSP is tied high and ADSC is tied low.
The upper and lower portions of the diagram together assume active use of only the Enable, Write and ADSC control inputs and assumes
ADSP is tied high and ADV is tied low.
X
CW
X
First Write
Burst Write
W
W
Simplified State Diagram
CW
14/32
W
CR
R
CR
R
Deselect
X
1,
E
2,
E
3
) and Write (B
R
GS840E18/32/36AT/B-180/166/150/100
CR
First Read
Burst Read
R
R
A
, B
B
, B
CR
C
X
, B
X
D
, BW and GW) control inputs
© 1999, GSI Technology
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