ak4589 AKM Semiconductor, Inc., ak4589 Datasheet - Page 35

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ak4589

Manufacturer Part Number
ak4589
Description
2/8-channel Audio Codec With Dir
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
Soft mute operation is performed at digital domain. When the SMUTE bit goes to “1”, the output signal is attenuated by
-∞ during ATT_DATA×ATT transition time (Table 16) from the current ATT level. When the SMUTE bit is returned
to “0”, the mute is cancelled and the output attenuation gradually changes to the ATT level during ATT_DATA×ATT
transition time. If the soft mute is cancelled before attenuating to -∞ after starting the operation, the attenuation is
discontinued and returned to ATT level by the same cycle. The soft mute is effective for changing the signal source
without stopping the signal transmission.
Notes:
The AK4589 should be reset once by bringing PDN pin = “L” upon power-up. The AK4589 is powered up and the
internal timing starts clocking by LRCK1 “↑” after exiting reset and power down state by MCLK. The AK4589 is in the
power-down mode until MCLK and LRCK1 are input.
MS0339-E-00
Soft mute operation
(1) ATT_DATA×ATT transition time (Table 16). For example, in Normal Speed Mode, this time is 1792LRCK1
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled before attenuating to -∞ after starting the operation, the attenuation is discontinued
(4) When the input data at all the channels of the group are continuously zeros for 8192 LRCK1 cycles, DZF pin of
System Reset
SMUTE bit
Attenuation
AOUT
DZF1,2
cycles (1792/fs) at ATT_DATA=00H. ATT transition of the soft-mute is from 00H to 7FH
and returned to ATT level by the same cycle.
each channel goes to “H”. DZF pin immediately goes to “L” if the input data of either channel of the group are
not zero after going DZF “H”.
ATT Level
-∞
Figure 13. Soft mute and zero detection
(1)
8192/fs
(4)
GD
- 35 -
(2)
(1)
GD
(3)
[AK4589]
2004/09

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