ak4589 AKM Semiconductor, Inc., ak4589 Datasheet - Page 58

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ak4589

Manufacturer Part Number
ak4589
Description
2/8-channel Audio Codec With Dir
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
Reset & Initialize
Format & De-emphasis Control
MS0339-E-00
Addr
00H CLK & Power Down Control
Register Definitions
Addr
01H Format & De-em Control
PWN: Power Down
OCKS1-0: Master Clock Frequency Select
CM1-0: Master Clock Operation Mode Select
BCU: Block start & C/U Output Mode
RSTN2: Timing Reset & Register Initialize
CS12: Channel Status Select
DFS: 96kHz De-emphasis Control
DEM1-0: 32, 44.1, 48kHz De-emphasis Control (see Table 24.)
DEAU: De-emphasis Auto Detect Enable
DIF2-0: Audio Data Format Control (see Table 29.)
Register Name
Default
R/W
Default
Register Name
R/W
0: Reset & Initialize
1: Normal Operation
0: Power Down
1: Normal Operation
When BCU=1, the three Output Pins(BOUT, COUT, UOUT) become to be enabled.
The block signal goes high at the start of frame 0 and remains high until the end of frame 31.
0: Channel 1
1: Channel 2
Selects which channel status is used to derive C-bit buffers, AUDION, PEM, FS3, FS2, FS1, FS0,
Pc and Pd. The de-emphasis filter is controlled by channel 1 in the Parallel Mode.
0: Disable
1: Enable
CS12
R/W
D7
0
RD
D7
0
0
BCU
R/W
D6
1
DIF2
R/W
D6
1
- 58 -
CM1
R/W
D5
0
DIF1
R/W
D5
1
CM0
R/W
D4
DIF0
R/W
0
D4
0
OCKS1 OCKS0
DEAU DEM1 DEM0
R/W
R/W
D3
D3
0
1
R/W
R/W
D2
D2
0
0
R/W
PWN
R/W
D1
D1
1
1
[AK4589]
2004/09
R/W
RSTN2
DFS
D0
R/W
0
D0
1

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