ak4646 AKM Semiconductor, Inc., ak4646 Datasheet - Page 47
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ak4646
Manufacturer Part Number
ak4646
Description
Stereo Codec With Mic/spk-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4646.pdf
(79 pages)
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When DACL bit is “1”, Lch/Rch signal of DAC is output from the LOUT/ROUT pins which is single-ended. When
DACL bit is “0”, output signal is muted and LOUT/ROUT pins output VCOM voltage. The load impedance is 10k Ω
(min.). When the PMLO bit = LOPS bit = “0”, the stereo line output enters power-down mode and the output is
pulled-down to AVSS by 100k Ω (typ). When the LOPS bit is “1”, stereo line output enters power-save mode. Pop noise at
power-up/down can be reduced by changing PMLO bit at LOPS bit = “1”. In this case, output signal line should be
pulled-down to AVSS by 20k Ω after AC coupled as Figure 32. Rise/Fall time is 300ms (max) at C=1 μ F. When PMLO bit
= “1” and LOPS bit = “0”, stereo line output is in normal operation.
LOVL bit set the gain of stereo line output.
MS0557-E-02
Stereo Line Output (LOUT/ROUT pins)
Figure 32. External Circuit for Stereo Line Output (in case of using Pop Reduction Circuit)
LOPS
0
1
Table 40. Stereo Line Output Mode Select (x: Don’t care)
PMLO
0
1
0
1
DAC
Table 41. Stereo Line Output Volume Setting
LOVL1-0 bits
00
01
10
11
Figure 31. Stereo Line Output
Normal Operation
“DACL”
Power-down
Power-save
Power-save
ROUT
LOUT
Mode
- 47 -
+2dB
+4dB
+6dB
Gain
0dB
1μF
“LOVL”
220Ω
(default)
Pull-down to AVSS
Fall down to AVSS
Normal Operation
Rise up to VCOM
LOUT/ROUT pin
20kΩ
ROUT pin
LOUT pin
(default)
[AK4646]
2007/05