ak4646 AKM Semiconductor, Inc., ak4646 Datasheet - Page 49
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ak4646
Manufacturer Part Number
ak4646
Description
Stereo Codec With Mic/spk-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4646.pdf
(79 pages)
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Power supply for Speaker-Amp (SVDD) is 2.2V to 4.0V. In case of dynamic (electromagnetic) speaker (load resistance <
50 Ω ), SVDD is 2.2V to 3.6V.
Note 18. Load impedance is total impedance of series resistance and piezo speaker impedance at 1kHz in 36HFigure 34.
The DAC output signal is input to the Speaker-amp as [(L+R)/2]. The Speaker-amp is mono and BTL output. The gain is
set by SPKG1-0 bits. Output level depends on AVDD voltage and SPKG1-0 bits.
Note 38. The output level is calculated by assuming that output signal is not clipped. In actual case, output signal may be
MS0557-E-02
Speaker Output
clipped when DAC outputs 0dBFS signal. DAC output level should be set to lower level by setting digital
volume so that Speaker-Amp output level is 4.0Vpp or less and output signal is not clipped.
Load capacitance is capacitance of piezo speaker. When piezo speaker is used, 10 Ω or more series resistors
should be connected at both SPP and SPN pins, respectively.
Load Capacitance (max)
Load Resistance (min)
Speaker Type
SPKG1-0 bits
SPKG1-0 bits
00
01
10
11
00
01
10
11
Table 42. Speaker Type and Power Supply Range
Table 44. SPK-Amp Output Level
ALC2 bit = “ 0 ”
4.23Vpp (Note 38)
5.33Vpp (Note 38)
6.71Vpp (Note 38)
Table 43. SPK-Amp Gain
ALC2 bit = “ 0 ”
+10.6dB
+4.6dB
+6.6dB
+8.6dB
SPK-Amp Output (DAC Input = 0dBFS)
Dynamic Speaker
3.37Vpp
- 49 -
30pF
8 Ω
Gain
ALC2 bit = “ 1 ”
+10.6dB
+12.6dB
(LMTH1-0 bits = “ 00 ” )
+6.6dB
+8.6dB
5.04Vpp (Note 38)
6.33Vpp (Note 38)
ALC2 bit = “ 1 ”
3.17Vpp
4.00Vpp
Piezo (Ceramic) Speaker
50 Ω (Note 18)
3 μ F (Note 18)
(default)
[AK4646]
2007/05