m21353 Mindspeed Technologies, m21353 Datasheet - Page 26

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m21353

Manufacturer Part Number
m21353
Description
4.25 Gbps Twelve-channel Backplane Equalizer And Driver With 12x12 Crosspoint Switch
Manufacturer
Mindspeed Technologies
Datasheet
5.4
Each input channel of the M21353 includes an input equalizer, design to compensate for bandwidth limitations of
PCB traces. The equalizer operates in a programmable mode, where a fixed equalization setting is selected. There
are 16 equalization settings available, which are programmed through register addresses 1Dh–28h when the
device is used in lane switching mode. When the device is used in group switching mode (default mode), the input
equalization setting is configured for the entire group using registers addresses 26h, 27h, and 28h. Addresses
1Dh-25h are not used when the device is in group switching mode. See the register description table for details on
how to select each equalization level. It is recommended that each channel of the system is characterized once to
optimize the equalization for each system channel.
5.5
Each output buffer of the M21353 includes a de-emphasis circuit that is configured by the user. There is
approximately 6 dB of de-emphasis available, and the de-emphasis levels are selectable through registers 41h-
4Ch. Note that when the device is used in group switching (default) mode, the output de-emphasis is set for each
group using registers 4Ah, 4Bh, and 4Ch.
5.6
Some protocols, such as SATA/SAS and PCIe, define a third logic state at the common mode for transmission of an
electrical bus idle (EBI) level. In SAS/SATA systems, OOB signals such as COMRESET, COMWAKE, and
COMSAS utilize burst and idle levels for communication. The M21353 is designed to pass the electrical bus idle
through the device to support SATA/SAS and PCIe protocol requirements. When the EBI feature of the M21353 is
enabled, the device will detect and pass EBI signals with minimal distortion of the signal. The EBI circuit is
controlled through registers 35h-40h.
5.7
To avoid random chattering of the output due to noise when there is no signal present at the inputs, the M21353
includes a squelch feature to automatically inhibit the output when there is a LOS alarm. There is an option to
inhibit to either logic H, logic L, or the EBI common mode level on squelch. In addition to the automatic squelch
feature, a manual squelch can be forced through a register setting. When an input channel is squelched, any output
configured to be connected to the squelched input will be H, L, or F depending on the selected squelch level. LOS
should either be disabled or set to "never squelch" when the EBI circuit is enabled to allow the device to detect data
bursts quickly after electrical idle periods that last longer than approximately 5 us. The squelch circuit is controlled
through register 03h, and also through registers 35h-40h.
5.8
The M21353 can pass pathological video data error-free for SD-SDI, HD-SDI, and 3G-SDI data rates. for optimal
performance, AC coupling capacitors with a minimum value of 4.7 uF should be used on the high-speed inputs and
outputs of the M21353. Also, the amplitude used to drive a signal across a system backplane should be increased
in systems that pass SDI video as noted in the input launch amplitude specification in
21353-DSH-001-B
Input Equalization
Output De-emphasis
Electrical Bus Idle Pass-through
Squelch
Operation in SDI Video Applications
Mindspeed Technologies
®
Table
Functional Description
1-4.
26

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