uaa3580 NXP Semiconductors, uaa3580 Datasheet
uaa3580
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uaa3580 Summary of contents
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... DATA SHEET UAA3580 Wideband code division multiple access frequency division duplex zero IF receiver Objective specification Supersedes data of 2002 Oct 16 INTEGRATED CIRCUITS 2002 Oct 30 ...
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... SERIAL BUS TIMING CHARACTERISTICS 16 APPLICATION INFORMATION 2002 Oct 30 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction to soldering surface mount packages 18.2 Reflow soldering 18.3 Wave soldering 18.4 Manual soldering 18.5 Suitability of surface mount IC packages for wave and reflow soldering methods 19 DATA SHEET STATUS 20 DEFINITIONS 21 DISCLAIMERS 2 Objective specification UAA3580 ...
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... Duplex (FDD) mode of the Wide Code Division Multiple Access (WCDMA) that operates in the 2110 to 2170 MHz band. The UAA3580 contains the whole analog receive chain from Radio Frequency (RF) Low Noise Amplifier (LNA) to baseband IQ outputs including a channel filter, a complete RF Phase-Locked Loop (PLL) with a fully integrated ...
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... RFGND 4 RFIP LNA 5 RFIN 6 IFGND 7 RXCEN 8 V CCA(IF) 2002 Oct 30 UAA3580HN RF RF SIGMA DELTA FRACTIONAL-N VCO SERIAL INTERFACE DIVIDE-BY-2 MIXER MIXER Fig.1 Block diagram. 4 Objective specification UAA3580 18 REXT 17 DIVIDE-BY-2 UMTSCLKO 16 V DDD CLK 13 DATA FCA236 ...
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... Wideband code division multiple access frequency division duplex zero IF receiver 7 PINNING INFORMATION 7.1 Pinning handbook, full pagewidth 2002 Oct 30 6 IFGND 5 RFIN RFIP 4 UAA3580HN RFGND 3 V CCA(RF) 2 VCOGND 1 Fig.2 Pin configuration. 5 Objective specification UAA3580 13 DATA 14 CLK DDD 17 UMTSCLKO 18 REXT FCA237 ...
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... RF charge pump output decoupling capacitor for the VCO regulator ground 6 Objective specification UAA3580 ...
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... RXCEN signal is set HIGH (also via the 3-wire bus). The power-up signal is detected on pin V the voltage rises. The V maintained, enables the programming parameters to be retained in memory. 7 Objective specification UAA3580 ) fractional-N when DDD pin, if the supply voltage is DDD ...
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... Objective specification UAA3580 SYNON RXON ATTENUATION FROM AGC1 AGC0 MAXIMUM GAIN (dB ...
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... Objective specification UAA3580 ATTENUATION FROM AGC1 AGC0 MAXIMUM GAIN (dB ...
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... Objective specification UAA3580 ATTENUATION FROM AGC1 AGC0 MAXIMUM GAIN (dB ...
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... The clock PLL output divider ratio is set in accordance with Table 5. Table 5 Clock mode; note 1 CLKoff ref 0 0 Note don’t care. 11 Objective specification UAA3580 DESCRIPTION 1 0 CLKPLL synthesizer enabled (default CLKPLL synthesizer disabled; note CLKPLL synthesizer disabled; note 2 (4) ...
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... RF PLL 22 fractional division ratio for the RF PLL 12 automatic frequency control for the clock PLL 1 clock PLL disabled 2 integer division ratio for the clock PLL 12 Objective specification UAA3580 ADDRESS SYNON 0 1 SYNON 0 1 ...
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... CONDITIONS CONDITIONS in free air layer PCB and with soldered exposed die pad 13 Objective specification UAA3580 ADDRESS ...
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... V CCA(RF) V and V CCA(CP) CCA(SYN) receive mode; note 1 receive mode; note 2 synthesizer mode; note 3 standby mode; note 4 sleep mode; note 5 0.5 0.5 note 1.8 k ext 14 Objective specification UAA3580 MIN. TYP. MAX 2.6 2.8 3.3 CCA(IF) 1.6 1.8 2 ...
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... L(diff) THD < 1. MHz; 650 o(p- L(diff L(diff) 20 2nd-order high-pass 10 frequency 5th-order low-pass 2.25 frequency 100 kHz < f < 2 MHz o 15 Objective specification UAA3580 TYP. MAX. UNIT 2.17 GHz 170 3 dBm 15 dBm 42 dBm 135 dBc/Hz 96 100 ...
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... V CPCLKO MHz ref THD = 1% ext THD = 1% ext charge pump current within specified range THD = 1% ext over full charge pump voltage range 16 Objective specification UAA3580 MIN. TYP. MAX 2.11 2.17 26 0.05 6 170 200 230 ...
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... AFC 3.3 V CPCLKO V = 1.3 V CPCLKO at 2 kHz offset for 30.72 MHz at 3.84 MHz offset for 30.72 MHz MHz REF MHz REF 17 Objective specification UAA3580 MIN. TYP. MAX. 231 AFC --------- - + ------------ 512 0.4512 0.4532 100 140 0.4 V 0.4 CCA 15 ...
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... CLK DATA MSB EN t d(START) 2002 Oct unless otherwise specified. amb PARAMETER t h;DAT t i(f) T cyc Fig.3 Serial bus timing diagram. 18 Objective specification UAA3580 MIN. TYP. MAX 200 100 400 200 d(END) t i(r) t su;EN LSB ...
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... Acrobat reader. white to force landscape pages to be ... antenna or switch ceramic duplexer isolator VCOGND 1 V CCA(RF) 2 RFGND 3 UAA3580 RFIP 4 RFIN 5 IFGND BATTERY ...
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... 1 1 2.5 scale ( 2.25 4.1 2.25 0.5 2.5 2.5 1.95 3.9 1.95 REFERENCES JEDEC JEITA MO-220 - - - 20 Objective specification UAA3580 detail 0.5 0.05 0.1 0.1 0.05 0.3 EUROPEAN ISSUE DATE PROJECTION 01-08-08 02-10-22 SOT616-1 c ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 21 Objective specification UAA3580 ...
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... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 Oct 30 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 22 Objective specification UAA3580 (1) REFLOW suitable suitable suitable suitable suitable ...
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... Objective specification UAA3580 DEFINITION These products are not Philips Semiconductors ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited ...