uaa3580 NXP Semiconductors, uaa3580 Datasheet - Page 3

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uaa3580

Manufacturer Part Number
uaa3580
Description
Wideband Code Division Multiple Access Frequency Division Duplex Zero If Receiver
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
1
2
4
5
2002 Oct 30
V
V
T
UAA3580HN
Low noise wide dynamic range for zero IF receivers
79 dB gain control range; in steps of 1 dB
Channel filters
96 dB voltage gain
Fully integrated fractional-N synthesizer with AFC
control capability
Fully integrated RF VCO with integrated supply voltage
regulator
Fully differential design to minimize crosstalk
Supply voltage from 2.4 to 3.3 V
3-wire serial interface bus
HVQFN24 package.
WCDM-FDD receiver for GSM hand-portable equipment
Dual mode GSM/GPRS/EDGE/UMTS handset.
amb
CCA
DDD
Wideband code division multiple access
frequency division duplex zero IF receiver
NUMBER
SYMBOL
FEATURES
APPLICATIONS
QUICK REFERENCE DATA
ORDERING INFORMATION
TYPE
analog supply voltage
digital supply voltage
ambient temperature
HVQFN24
NAME
plastic, heatsink very thin quad flat package; no leads
24 terminals; body 4
PARAMETER
PACKAGE
4
3
DESCRIPTION
3
The UAA3580 is a BiCMOS integrated circuit receiver
intended for the Third Generation Partnership Project
(3GPP) specification for the Universal Mobile
Telecommunication System (UMTS).
The circuit is specially designed for the Frequency Division
Duplex (FDD) mode of the Wide Code Division Multiple
Access (WCDMA) that operates in the 2110 to 2170 MHz
band.
The UAA3580 contains the whole analog receive chain
from Radio Frequency (RF) Low Noise Amplifier (LNA) to
baseband IQ outputs including a channel filter, a complete
RF Phase-Locked Loop (PLL) with a fully integrated
Voltage Controlled Oscillator (VCO), and a clock PLL that
generates a programmable UMTS system clock from an
external 26 MHz reference signal.
0.90 mm
GENERAL DESCRIPTION
2.6
1.6
MIN.
30
TYP.
Objective specification
UAA3580
3.3
2.8
+70
MAX.
VERSION
SOT616-1
V
V
UNIT
C

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