hi-3584a Holt Integrated Circuits, Inc., hi-3584a Datasheet
hi-3584a
Related parts for hi-3584a
hi-3584a Summary of contents
Page 1
... The independent transmitter also has FIFO The status of all three FIFOs can be monitored using . the external status pins or by polling the HI-3584A’s status register. Other features include a programmable option of data or parity in the 32nd bit, and the ability to unscramble the 32 bit word ...
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... Read Status Register if SEL=0, read Control Register if SEL=1 CLK INPUT Master Clock input TX CLK OUTPUT Transmitter Clock equal to Master Clock (CLK), divided by either 10 or 80. MR INPUT Master Reset, active low HI-3584A DESCRIPTION 5 HOLT INTEGRATED CIRCUITS 2 must be connect to the same supply) EN1 is high PL1. ...
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... FUNCTIONAL DESCRIPTION CONTROL WORD REGISTER The HI-3584A contains a 16-bit control register which is used to configure the device. The control register bits CR0 - CR15 are loaded from BD00 - BD15 when CWSTR trol register contents are output on the databus when SEL = 1 and RSR is pulsed low. Each bit of the control register has the follow- ...
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... RIN2B GND FIGURE 1. ARINC RECEIVER INPUT HI-3584A The HI-3584A guarantees recognition of these levels with a common mode Voltage with respect to GND less than ±4V for the worst case condition (3.0V supply and 13V signal level). The tolerances in the design guarantee detection of the above levels, so the actual acceptance ranges are slightly larger ...
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... HF FF D/R FIFO LOAD CONTROL / LABEL / CONTROL DECODE BIT COMPARE LABEL MEMORY EOS ONES SHIFT REGISTER NULL SHIFT REGISTER ZEROS SHIFT REGISTER HI-3584A CR2(3) ARINC word CR6(9) ARINC word matches label Yes Yes Yes TO PINS R/W CONTROL ...
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... PL2 for receiver 2. word reception is suspended during the label memory write sequence. 32 BIT PARALLEL LOAD SHIFT REGISTER FIFO DATA BUS HI-3584A READING LABELS D/R1 or D/R2 (or both) both After the write that changes CR1 from the next 16 data reads of the selected receiver ( ...
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... Clocks 40 Clocks HI-3584A-15 320 Clocks The HI-3584A-15 option is similar to the HI-3584A with the excep- tion that it allows an external 15 Kohm resistor to be added in se- ries with each ARINC input without affecting the ARINC input thresholds. This option is especially useful in applications where lightning protection circuitry is also required. ...
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... ARINC DATA BIT 31 BIT 32 D D/R DON'T CARE SEL EN CLK DATA BUS t DATA BUS PL1 PL2 TX/R, HFT FFT , DATA BUS CWSTR HI-3584A DATA RATE - EXAMPLE PATTERN DATA DATA NULL NULL BIT 32 BIT 31 RECEIVER OPERATION t t SELEN t SELEN ENSEL t ENEN t D/REN t t DATAEN ...
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... PL t CWSTR CWSTR EN1 EN2 / t CWHLD t CWSET DATA BUS Set CR1=1 Label #1 t ENDATA HI-3584A STATUS REGISTER READ CYCLE DON'T CARE t SELEN DATA VALID t ENDATA CONTROL REGISTER READ CYCLE DON'T CARE t SELEN DATA VALID t ENDATA LABEL MEMORY LOAD SEQUENCE Label #2 ...
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... BIT 32 RIN D D/R D/REN EN t SELEN SEL DON'T CARE t ENPL PL1 PL2 TXR ENTX 429DO 429DO HI-3584A TRANSMITTING DATA ARINC BIT ARINC BIT DATA DATA BIT 1 BIT 2 One Null Zero Null REPEATER OPERATION TIMING t END ENEN EN t ENSEL ...
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... Logic "0" Output Voltage Output Current: (All Outputs & Bi-directional Pins) Output Capacitance: Operating Supply Current VDD HI-3584A Power Dissipation at 25°C .......................................... 500 mW DC Current Drain per pin .............................................. ±10mA Storage Temperature Range ........................ -65°C to +150°C +0.3V DD Operating Temperature Range (Industrial): .... -40°C to +85°C ° ...
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... MASTER RESET PULSE WIDTH ARINC DATA RATE AND BIT TIMING HEAT SINK - CHIP-SCALE PACKAGE ONLY The HI-3584APCI and HI-3584APCT use a 64-pin plastic chip-scale package. This package has a metal heat sink pad on its bottom surface. This heat sink is electrically connected to the die. To enhance thermal dissipation, the ...
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... ADDITIONAL HI-3584A PIN CONFIGURATION (See page 1 for additional pin configurations) FF1 HF1 D/R2 FF2 HF2 SEL - 13 EN1 EN2 BD15 - 16 BD14 - 17 BD13 - 18 BD12 - 19 BD11 - 20 ORDERING INFORMATION HI - 3584A PART NUMBER No dash number PART NUMBER PART NUMBER PART NUMBER HI-3584A - N ENTX ...
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... REVISION HISTORY P/N Rev Date Description of Change DS3584A NEW 04/28/09 Initial Release A 04/27/10 Added CLKEN to timing parameters. B 06/29/10 Added PLCYC to timing parameters. HI-3584A HOLT INTEGRATED CIRCUITS 14 ...
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... PLASTIC QUAD FLAT PACK (PQFP) .520 BSC SQ (13.2) .063 (1.6) See Detail A .063 MAX. (1.6) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-3584A PACKAGE DIMENSIONS max .788 (20.0) SQ. .750 .007 (19.05 .18) .190 max (4.826) .050 BSC (1 ...
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... PLASTIC CHIP-SCALE PACKAGE .354 BSC (9.00) .354 Top View BSC (9.00) .039 max (1.00) HI-3584A PACKAGE DIMENSIONS Heat sink pad on bottom of package. Heat sink can float or can be connected to V-. DO NOT connect heat sink to VDD, GND or V+ .281 ± .006 (7.15 ± .15 ) .016 ± .004 (0.40 ± ...