hi-3585 Holt Integrated Circuits, Inc., hi-3585 Datasheet

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hi-3585

Manufacturer Part Number
hi-3585
Description
Terminal Ic With Spi Interface
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
hi-3585PQT
Manufacturer:
HOLT
Quantity:
101
Part Number:
hi-3585PQTF
Manufacturer:
HITTITE
Quantity:
101
FEATURES
GENERAL DESCRIPTION
The HI-3585 from Holt Integrated Circuits is a silicon gate
CMOS device for interfacing a Serial Peripheral Interface
(SPI) enabled microcontroller to the ARINC 429 serial bus.
The device provides one receiver with user-programmable
label recognition for any combination of 256 possible
labels, 32 x 32 Receive FIFO and analog line receiver.
The independent transmitter has a 32 x 32 Transmit FIFO
and built-in line driver. The status of the transmit and
receive FIFOs can be monitored using the programmable
external interrupt pin, or by polling the HI-3585 Status
Register. Other features include a programmable option
of data or parity in the 32nd bit, and the ability to switch the
bit-signifiance of ARINC 429 labels. Pins are available
with different input resistance and output resistance
values which provides flexibility when using external
lightning protection circuitry.
The Serial Peripheral Interface minimizes the number of
host interface signals resulting in a small footprint device
that can be interfaced to a wide range of industry-standard
microcontrollers supporting SPI.
signals may be controlled using just four general purpose
I/O port pins from a microcontroller or custom FPGA. The
SPI and all control signals are CMOS and TTL compatible
and support 3.3V or 5V operation.
The HI-3585 applies the ARINC 429 protocol to the
receiver and transmitter.
comes from a 1 MHz clock input, or an internal counter can
derive it from higher clock frequencies having certain fixed
values, possibly the external host processor clock.
(DS3585 Rev. NEW)
May 2008
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ARINC specification 429 compliant
3.3V or 5.0V logic supply operation
On-chip analog line driver and receiver connect
Programmable label recognition for 256 labels
32 x 32 Receive FIFO and 32 x 32 Transmit FIFO
Independent data rates for Transmit and Receive
High-speed, four-wire Serial Peripheral Interface
Label bit-order control
32nd transmit bit can be data or parity
Self test mode
Low power
Industrial & full military temperature ranges
directly to ARINC 429 bus
ARINC 429 databus timing
Alternatively, the SPI
HOLT INTEGRATED CIRCUITS
www.holtic.com
PIN CONFIGURATIONS
RINB-40 - 2
Terminal IC with SPI Interface
RINB - 3
N/C - 1
N/C - 4
N/C - 5
N/C - 6
N/C - 10
N/C - 11
MR - 7
CS
SI - 8
44 - Pin Plastic Quad Flat Pack (PQFP)
RINB-40 - 2
- 9
RINB - 3
N/C - 1
N/C - 4
N/C - 5
N/C - 6
N/C - 10
N/C - 11
MR - 7
CS
SI - 8
44 - Pin Plastic 7mm x 7mm
Chip-Scale Package (QFN)
- 9
HI-3585PCT
HI-3585PCI
HI-3585PQT
HI-3585PQI
HI-3585
ARINC 429
(Top View)
33 - BOUT27
32 - BOUT37
31 - N/C
30 - V-
29 - N/C
28 - TFLAG
27 - N/C
26 - N/C
25 - RFLAG
24 - N/C
23 - N/C
33 - BOUT27
32 - BOUT37
31 - N/C
30 - V-
29 - N/C
28 - TFLAG
27 - N/C
26 - N/C
25 - RFLAG
24 - N/C
23 - N/C
05/08

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hi-3585 Summary of contents

Page 1

... May 2008 GENERAL DESCRIPTION The HI-3585 from Holt Integrated Circuits is a silicon gate CMOS device for interfacing a Serial Peripheral Interface (SPI) enabled microcontroller to the ARINC 429 serial bus. The device provides one receiver with user-programmable label recognition for any combination of 256 possible labels Receive FIFO and analog line receiver ...

Page 2

... Positive 5V power supply to ARINC 429 Line Driver VDD POWER 3.3V or 5.0V logic power RINA-40 INPUT Alternate ARINC receiver positive input. Requires external 40K ohm resistor RINA INPUT ARINC receiver positive input. Direct connection to ARINC 429 bus HI-3585 VDD ARINC Clock Divider ARINC 429 ARINC 429 Transmit Transmit Data FIFO ...

Page 3

... Write the Control Register 11 None Reset the Transmit FIFO. 12 None Transmission enabled by this instruction only if Control Register bit 13 is zero HI-3585 Table 1 lists all instructions. Instructions that perform a reset or set, or enable transmission are executed after the last SI bit is received while CS is still low. Example: ...

Page 4

... FUNCTIONAL DESCRIPTION CONTROL WORD REGISTER The HI-3585 contains a 16-bit Control Register which is used to configure the device. Control Register bits CR15 - CR0 are loaded from a 16-bit data value appended to SPI instruction 10 hex. The Control Register contents may be read using SPI instruction 0B hex. Each bit of the Control Register has the following function: ...

Page 5

... FUNCTIONAL DESCRIPTION (cont.) ARINC 429 DATA FORMAT Control Register bit CR11 controls how individual bits in the received or transmitted ARINC word are mapped to the HI-3585 SPI data word bits during data read or write operations. following table describes this mapping: Table 2. SPI / ARINC bit-mapping ...

Page 6

... LOAD CONTROL / LABEL / CONTROL BITS DECODE CR2, CR6-8 COMPARE 256-BIT LABEL LOOK-UP TABLE EOS ONES SHIFT REGISTER NULL SHIFT REGISTER SHIFT REGISTER ZEROS HI-3585 TABLE 3. FIFO LOADING CONTROL CR2 ARINC word matches Enabled label Yes Yes ...

Page 7

... CS SPI COMMANDS SPI INTERFACE SI SO FIGURE 3. HI-3585 READING THE LABEL LOOK-UP TABLE The contents of the Label Look-up table may be read via the SPI interface using instruction 0D hex as described in Table 1. TRANSMITTER FIFO OPERATION The Transmit FIFO is loaded with ARINC 429 words awaiting transmission ...

Page 8

... The Transmit FIFO can store 32 words maximum and ignores attempts to load additional data when full. LINE DRIVER OPERATION The line driver in the HI-3585 directly drives the ARINC 429 bus. The two ARINC outputs (AOUT37 and BOUT37) provide a differential voltage to produce a +10V One, a -10V Zero, and a 0 Volt Null ...

Page 9

... SCK SO Hi Impedance TXAOUT ARINC BIT TXBOUT DATA NULL BIT 30 BIT 31 ARINC DATA BIT 32 RFLAG t RFLG CS SPI INSTRUCTION 08h, (or 09h HI-3585 SERIAL INPUT TIMING DIAGRAM t CYC t t CES CES t t SCKR DH MSB SERIAL OUTPUT TIMING DIAGRAM t CYC t DV MSB DATA RATE - EXAMPLE PATTERN ...

Page 10

... BOUT) 10% one level HEAT SINK - CHIP-SCALE PACKAGE ONLY The HI-3585PCI and HI-3585PCT use a 44-pin plastic chip-scale package. This package has a metal heat sink pad on its bottom surface. This heat sink is electrically connected to the die. To enhance thermal dissipation, the ABSOLUTE MAXIMUM RATINGS Supply Voltages V ...

Page 11

... ARINC output current LOGIC OUTPUTS Output Voltage: Logic "1" Output Voltage Logic "0" Output Voltage Output Current: Output Capacitance: Operating Voltage Range Operating Supply Current VDD V+ V- HI-3585 CONDITIONS SYMBOL ONE V Common mode voltages IH ZERO V less than ±30V with IL NULL ...

Page 12

... Delay TFLAG high after enable transmit - Lo Speed Line driver transition differential times: (High Speed, control register CR10 = Logic 0) (Low Speed, control register CR10 = Logic 1) ORDERING INFORMATION HI - 3585 PART NUMBER PART NUMBER PART NUMBER HI-3585 SYMBOL SCK clock period t CYC t CHH t CES t CEH t ...

Page 13

... REVISION HISTORY Revision Date Page Description of Change DS3585, Rev. NEW 05/08/08 All HI-3585 Initial Release HOLT INTEGRATED CIRCUITS 13 ...

Page 14

... SQ. See Detail A .063 MAX. (1.6) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-3585 PACKAGE DIMENSIONS .203 ± .006 (5.15 ± .15) .008 Heat sink pad on bottom of package. typ (0.2) Heat sink must be left floating or connected NOT connect to GND, VDD or V-. .394 ± ...

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