hi-3587 Holt Integrated Circuits, Inc., hi-3587 Datasheet - Page 4

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hi-3587

Manufacturer Part Number
hi-3587
Description
Transmitter With Spi Interface
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet

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FUNCTIONAL DESCRIPTION
CONTROL WORD REGISTER
The HI-3587 has a 16-bit Control Register which configures the
device. Control Register bits CR15 - CR0 are loaded from a 16-bit
data value appended to SPI instruction 10 hex. The Control
Register contents may be read using SPI instruction 0B hex. Each
bit of the Control Register has the following function:
(MSB)
(LSB)
CR10
CR11 ARINC Label
CR12
CR13 Transmission
CR15
Cr14
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
CR9
CR
Bit FUNCTION STATE
Source Select
ARINC Clock
Enable Mode
Transmitter
Transmitter
Transmitter
Line Driver
Data Rate
Parity Bit
Bit Order
Definition
Disable
Enable
TFLAG
Select
Parity
-
-
-
-
-
-
-
-
X
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Line Driver disabled (force outputs to Null state)
TFLAG goes high when transmit FIFO is empty
TFLAG goes high when transmit FIFO is full
ARINC CLK = ACLK divided by the value
programmed with SPI Instruction 07 hex
Label bit order reversed (See Table 2)
ARINC CLK = ACLK input frequency
Transmit whenever data is available
Data rate=CLK/80, O/P slope=10us
Label bit order same as transmitted
Data rate=CLK/10, O/P slope=1.5u
Transmitter 32nd bit is Even parity
Transmitter 32nd bit is Odd parity
Transmitter 32nd bit is parity
Transmitter 32nd bit is data
Start transmission by SPI
Line Driver enabled
in the Transmit FIFO
DESCRIPTION
instruction12h
(See Table 2)
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
HOLT INTEGRATED CIRCUITS
HI-3587
4
STATUS REGISTER
The HI-3587 contains an 8-bit Status Register which can be
interrogated to determine status of the ARINC Transmit FIFO. The
Status Register is read using SPI instruction 0A hex. Unused bits
are undefined and may be read as either “1” or “0”. The following
table defines the Status Register bits.
(MSB)
(LSB)
SR0
SR1
SR2
SR3
SR4
SR5
SR6
SR7
SR
Bit
Transmit FIFO
Transmit FIFO
Transmit FIFO
FUNCTION
Not used
Not used
Not used
Not used
Not used
Half Full
Empty
Full
STATE
X
X
X
0
1
0
1
0
1
0
0
Undefined
Undefined
Undefined
Transmit FIFO not empty.
Sets to One when all data has
been sent. TFLAG pin reflects the
state of this bit when CR14=0
Transmit FIFO is empty.
Transmit FIFO contains less than 16
words
Transmit FIFO contains at least 16
words
Transmit FIFO not full. TFLAG pin
reflects the state of this bit when
CR14=1
Transmit FIFO full.
Always 0
Always 0
DESCRIPTION

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