thncf032mbai TOSHIBA Semiconductor CORPORATION, thncf032mbai Datasheet - Page 15

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thncf032mbai

Manufacturer Part Number
thncf032mbai
Description
Thncfxxxmba/bai Series Compactflash Card Flash Technology Based With Interface Flash Memory Card.
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
2. Configuration and Status register (Address 202h)
Note:
CHGED
(CARD->)
SIGCHG
(HOST->)
IOIS8
(HOST->)
PWD
(HOST->)
INTR
(CARD->)
This register is used for observing the state of the card.
CHGED
Name
bit7
initial value → 00H
SIGCHG
R/W
R/W
R/W
R/W
bit6
R
R
This bit indicates that CRDY/−BSY bit on Pin Replacement register is set to “1”. When CHGED bit
is set to “1”, −STSCHG pin is held “L” at the condition of SIGCHG bit set to “1” and the card
configured for the I/O interface.
This bit is set or reset by the host for enabling and disabling the status-change signal (
pin). When the card is configured I/O card interface and this bit is set “1”,
controlled by CHGED bit. If this bit is set to “0”,
The host sets this field to “1” when it can provide I/O cycles only with on 8 bit data bus (D7
When this bit is set to “1”, the card enters sleep state (Power Down mode). When this bit is reset
to “0”, the card transfers to idle state (active mode). RRDY/BSY bit on Pin Replacement Register
becomes BUSY when this bit is changed. RRDY/BSY will not become Ready until the power state
requested has been entered. This card automatically powers down when it is idle and powers
back up when it receives a command.
This bit indicates the internal state of the interrupt request. This bit state is available whether I/O
card interface has been configured or not. This signal remains true until the condition, which
caused the interrupt request, has been serviced. If the
disables interrupts, this bit is a zero.
IOIS8
bit5
Preliminary
bit4
0
bit3
0
Function
STSCHG pin is kept “H”.
THNCFxxxMBA/BAI Series
PWD
bit2
IEN bit in the Device Control Register
2002-10-20 15/48
INTR
bit1
STSCHG pin is
bit0
STSCHG
0
to
D0).

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