saa4970t NXP Semiconductors, saa4970t Datasheet
saa4970t
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saa4970t Summary of contents
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... DATA SHEET SAA4970T Economical video processing IC (ECOBENDIC) Preliminary specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1996 Oct 25 ...
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... It consists of sync/memory control, video enhancing features and D/A conversion. The IC is designed to cooperate with an 83C654 type of microcontroller, Texas Instruments TMS4C2970/2971 memories plus A/D converter TDA8755/8753A. PARAMETER PACKAGE DESCRIPTION plastic very small outline package; 56 leads 2 Preliminary specification SAA4970T MIN. MAX. UNIT 4.5 5.5 V 4.75 5. ...
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... INTERFACE CK1 CK2 microcontroller ALE RDN WRN parallel bus AD7 to AD0 microcontroller address line command microcontroller parallel bits Fig.1 Block diagram. 3 Preliminary specification SAA4970T SYNC PROCESSING 18 ...
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... Y input bus bit 7 (MSB) Y input bus bit 6 Y input bus bit 5 Y input bus bit 4 4 Preliminary specification SAA4970T DESCRIPTION ...
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... Y input bus bit 0 (LSB) UV input bus bit 3 (MSB) UV input bus bit 2 UV input bus bit 1 UV input bus bit 0 (LSB) display clock digital ground (0 V) acquisition clock test control external crystal output (12 MHz) PLL crystal input (12 MHz) 5 Preliminary specification SAA4970T DESCRIPTION ...
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... Figures 5 and 6 show the effect of 32 the DCTI function with and without ‘over the hill protection’ AD5 31 when applied to a hill-shaped video pulse. AD6 30 AD7 29 6 Preliminary specification SAA4970T dV ). The effect at an edge is that during the + ...
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... Oct 25 (1) (2) ( Fig.3 DCTI with variation of k range. (1) (2) (3) ( (3) gain = 0.5. (4) gain = 1. Fig.4 DCTI with variation of k gain. 7 Preliminary specification SAA4970T MGE093 samples Gain = samples Range = 12 MGE094 45 ...
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... Oct 25 (1) ( Fig.5 DCTI with ‘over the hill protection’. (1) ( Fig.6 DCTI without ‘over the hill protection’. 8 Preliminary specification SAA4970T MGE095 samples 1 Gain = . 2 Range = 12. Hill protection = on. MGE096 samples 1 Gain = ...
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... MGE097 handbook, halfpage (1) IH_PeakingI (2) (3) (4) 1/2f s (1) (2) (3) (4) Fig.8 9 Preliminary specification and . The impulse response where 12 (1) 10 (2) (dB) 8 ( Peaking transfer function with variation SAA4970T is the MGE098 1/2f s ...
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... In case of 8 bits for the nominal signal there is room left for under and overshoot (adding total of 9 bits); in case of selecting all 9 bits of the luminance D/A converter for the nominal signal any under or overshoot will be clipped. 10 Preliminary specification SAA4970T (1) 6 (2) ...
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... If the set and reset registers have equal contents, the signal will remain reset (reset overruling set). The internal acquisition horizontal pulse HI is HIGH when the CNT_A contents are equal to a programmable value in the HI position register. 11 Preliminary specification SAA4970T ...
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... The counter value of CNT_D is monitored at the moment the VI2 rising edge is detected and can be read out from MUXE by the microcontroller. This value then indicates the number of lines in a video field. 12 Preliminary specification SAA4970T ...
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... The 8-bit data from the source 3-state enabled to the address/data bus 9-bit register is read out, the highest bit (bit 8) is coded in the MUXC source. The seven sources in the ECO-PSP are described in the read table. 13 Preliminary specification SAA4970T ...
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... ECO-PSP and 3-state switching on the output of such pulse, switching by the H input. This may provide a VCO control voltage, if combined with an RC filter. 14 Preliminary specification SAA4970T R1 DIVIDER FOR MULTI PICTURE 1 of the memory this period, a ...
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... Y clipping off inverts UV signals after UV processing inversion inversion reformatter binary twos complement reformatter 8-bit quantization 7-bit quantization 1 = pixel repetition constant colour for framing after addressing rising edge set after addressing falling edge set 15 Preliminary specification SAA4970T FUNCTION ...
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... K gain, bit 0; see Table 6 K gain, bit 1; see Table 6 over the hill protection on off not used not used not used frame grey level = 128 + register data (128 to 383) 16 Preliminary specification SAA4970T FUNCTION 1 CK1; 0: MC1 = CK1 4 1 CK2; 0: MC2 = CK2 4 ...
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... UV against Y signal, bit 1; see Table 8 delay of UV against Y signal, bit 2; see Table 8 delay of Y signal against UV signals, bit 0; see Table 9 delay of Y signal against UV signals, bit 1; see Table 9 delay of Y signal against UV signals, bit 2; see Table 9 17 Preliminary specification SAA4970T FUNCTION ...
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... Blanking-Acquisition-Interrupt 18 Preliminary specification FUNCTION 1 CK2; CK1 = div CK1 2 PLL_CORE 1 CK2; CK1 = div CK1 2 PLL_CORE ( bit bit bit bit bit bit bit 3 i SAA4970T ; ; ...
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... RE signal when register data = CNT_F sets first falling edge of RE signal when register data = CNT_F sets second rising edge of RE signal when register data = CNT_F sets second falling edge of RE signal when register data = CNT_F 19 Preliminary specification SAA4970T FUNCTION ...
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... R2 output enable CK2 sets rising edge of CLMP signal when register data = CNT_A sets falling edge of CLMP signal when register data = CNT_A Table 3 VALUE Preliminary specification SAA4970T FUNCTION value BIT 1 BIT VALUE 0 ...
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... PIXEL PER LINE TO BIT 0 OBTAIN DISPLAY CLOCK CK2 FROM CK2 = 2 (32 MHz CK2 = 2 (27 MHz CK2 = 2 (24 MHz CK2 = 2 (20.25 MHz) SAA4970T DELAY 1024 Hs 864 Hs 768 Hs 648 Hs ...
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... XXXX XX01 (01H) MUXC bit 2: status of PIP_intAc address XXXX XX01 (01H) MUXC IT2 bit 3: status of CD_intDb ATE NABLE address XXXX XX01 (01H) MUXC bit 5: status enabled). PARAMETER PARAMETER 22 Preliminary specification SAA4970T (GE) STATUS MIN. MAX. 0.5 +7 5.5 5.5 5. ...
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... V output voltage (without load) O 1996 Oct 25 = 4.75 to 5.25 V; unless otherwise specified. CC CONDITIONS note 1 note 2 note 2 /T cyHIGH cy note 2 note 2 referred to 8 MSB’s referred to 8 MSB’s note 3 23 Preliminary specification SAA4970T MIN. TYP. MAX. 4.5 5.5 4.75 5. 0.5 +0 ...
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... CLOCK CK1, CK2 INPUT DATA OUTPUT DATA 1996 Oct 25 line termination (p-p C27H t C27 DOD t DOH Fig.12 Timing diagram. 24 Preliminary specification SAA4970T = 25 pF series, close to the output pins, the 2.4 V 1.5 V 0.6 V 2.0 V 0.8 V 2.4 V 0.6 V MGE102 ...
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... ADC and memory write clock. With a PIP signal blanked in YUV, the ECOBENDIC will just manoeuvre the PIP position into the right memory location. The microcontroller gets the (12 MHz) clock and the watchdog reset signals from the ECOBENDIC. 25 Preliminary specification SAA4970T ...
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... Philips Semiconductors Economical video processing IC (ECOBENDIC) ndbook, full pagewidth 1996 Oct 25 26 Preliminary specification SAA4970T ...
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... REFERENCES JEDEC EIAJ 27 Preliminary specification detail 1.6 1.45 2.25 0.2 0.1 1.4 1.30 0.063 0.057 0.008 0.004 0.089 0.055 0.051 EUROPEAN PROJECTION SAA4970T SOT190 ( 0.90 0 0.035 0.004 0.022 ISSUE DATE 92-11-17 96-04-02 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 28 Preliminary specification SAA4970T ...
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... Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Oct 25 29 Preliminary specification SAA4970T ...
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... Philips Semiconductors Economical video processing IC (ECOBENDIC) 1996 Oct 25 NOTES 30 Preliminary specification SAA4970T ...
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... Philips Semiconductors Economical video processing IC (ECOBENDIC) 1996 Oct 25 NOTES 31 Preliminary specification SAA4970T ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + ...