saa4955tj NXP Semiconductors, saa4955tj Datasheet - Page 11

• Manufacturer Part Number: saa4955tj
• Description: 2.9-mbit Field Memory
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes
1. Typical values are valid for T
2. The write cycle timing set-up and hold times are related to V
3. The read cycle timing set-up and hold times are related to V
4. Disable times specified are from the initiating edge until the output is no longer driven by the memory. Disable times
1999 Apr 29
Read cycle timing; note 3
t
t
t
t
T
t
t
t
t
t
t
t
t
t
t
t
ACC
en(Q)
dis(Q)
h(Q)
W(SRCKH)
W(SRCKL)
su(RSTR)
h(RSTR)
su(RE)
h(RE)
W(REL)
su(OE)
h(OE)
W(OEL)
t
SYMBOL
cy(SRCK)
2.9-Mbit field memory
for configuration.
specified LOW- and HIGH-level input voltages (V
specified LOW- and HIGH-level input voltages (V
in parallel with a 218
are measured by observing the output waveforms. Low values of load resistor and capacitor have to be used to
obtain a short time constant.
access time after SRCK
output enable time after SRCK
output disable time after SRCK
output hold time after SRCK
SRCK cycle time
HIGH-level pulse width of SRCK see Fig.10
LOW-level pulse width of SRCK
set-up time RSTR
hold time RSTR
set-up time RE
hold time RE
LOW-level pulse width of RE
set-up time OE
hold time OE
LOW-level pulse width of OE
transition time (rise and fall)
PARAMETER
resistor to 1.31 V.
amb
= 25 C, V
DD
see Fig.10
see Fig.14
note 4; see Fig.14
see Fig.10
see Fig.10
see Fig.10
see Fig.10
see Fig.10
see Fig.13
see Fig.13
see Fig.13
see Fig.14
see Fig.14
see Fig.14
see Fig.10
= V
IL
IL
DD(O)
and V
CONDITIONS
and V
11
= V
IH
IH
). The load on each output is a 30 pF capacitor to ground
).
DD(P)
IL
IL
of the rising edge of SRCK. They are valid for the
of the rising edge of SWCK. They are valid for the
= 3.3 V, all voltages referenced to GND. See Fig.1
3
26
7
7
5
3
5
3
9
5
3
9
MIN.
3
TYP.
(1)
21
21
12
30
Product specification
SAA4955TJ
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT