mt9v032 aptina, mt9v032 Datasheet - Page 33

• Manufacturer Part Number: mt9v032
• Description: 1/3-inch Wide-vga Cmos Digital Image Sensor
• Manufacturer: aptina

Table 8:
PDF: 6538045704/Source:2194051501
MT9V022_DS - Rev. C 9/10 EN
Bit
0xA9 (169) AGC Output Update Frequency
0xAB (171) AGC Low Pass Filter
0xAF (175) AGC/AEC Enable
0xB0 (176) AGC/AEC Pixel Count
0xB1 (177) LVDS Master Control
0xB2 (178) LVDS Shift Clock Control
15-0
3:0
1:0
2:0
0
1
0
1
2
3
4
Gain Skip Frame
Gain LPF
AEC Enable
AGC Enable
Pixel Count
PLL Bypass
LVDS Power-down 0 = Normal operation.
PLL Test Mode
LVDS Test Mode
Shift-clk Delay
Element Select
LVDS Receiver
Power-down
Bit Name
Register Descriptions (continued)
The number of frames that the AGC must skip before
updating the gain register (R0xBA).
This value plays a role in determining the increment/
decrement size of gain value from frame to frame. If
current bin
When Gain LPF = 0:
Actual new gain = Calculated new gain
When Exp LPF = 1:
if |(Calculated new gain - current gain) | > (current gain/
4),
Actual new gain = Calculated new gain, otherwise
Actual new gain = Current exp ± (calculated new gain/
2)
When Exp LPF = 2:
if |(Calculated new gain - current gain) | > (current gain /
4),
Actual new gain = Calculated new gain, otherwise
Actual new gain = Current gain ± (calculated new gain/
4).
0 = Disable Automatic Exposure Control.
1 = Enable Automatic Exposure Control.
0 = Disable Automatic Gain Control.
1 = Enable Automatic Gain Control.
The number of pixel used for the AEC/AGC histogram.
0 = Internal shift-CLK is driven by PLL.
1 = Internal shift-CLK is sourced from the
LVDS_BYPASS_CLK.
1 = Power-down LVDS block.
0 = Normal operation.
1 = The PLL output frequency is equal to the system
clock frequency (26.6 MHz).
0 = Normal operation.
1 = The SER_DATAOUT_P drives a square wave in both
stereo and stand-alone modes). In stereo mode, ensure
that SER_DATAIN_P is logic “0.”
The amount of shift-CLK delay that minimizes inter-
sensor skew.
When set, LVDS receiver is disabled.
≠
0 (R0xBC)
Bit Description
34
MT9V032: 1/3-Inch Wide-VGA Digital Image Sensor
Default in
Hex (Dec)
(44,000)
ABE0
2
2
1
1
0
1
0
0
0
1
Aptina reserves the right to change products or specifications without notice.
Shadowed
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
©2005 Aptina Imaging Corporation. All rights reserved.
0–65535
Values
Legal
(Dec)
0–15
0–2
0–7
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
Registers
Read/
Write
W
W
W
W
W
W
W
W
W
W
W