hi-6121 Holt Integrated Circuits, Inc., hi-6121 Datasheet - Page 8
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hi-6121
Manufacturer Part Number
hi-6121
Description
Hi-6120 Parallel Bus Interface And Hi-6121 Serial Peripheral Interface Spi Mil-std-1553 Remote Terminal Ics
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet
1.HI-6121.pdf
(115 pages)
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MEMORY AND REGISTER ADDRESSING, Cont.
From this point on, all register and memory addresses
presented in this data sheet are 15-bit word addresses.
From the host standpoint, register operations and RAM
operations are performed identically. Registers occupy t
lowest 32 addresses, 0x0 to 0x001F. Depending on function,
individual r
combination of read-only and read-write bit fields. Read-only
registers, and read-only bit fields contained in registers, are
protected against accidental host overwrite by device logic.
0x7FFF
0x03FF
0x01FF
0x00FF
0x0400
0x0200
0x0100
0x0000
egisters may be read-only, read-write, or a
Multiple Descriptor Tables can be
Comprising 97% of the memory
Initialized by the host, this table
used for fast context switching.
defined by the Descriptor Table
The active Descriptor Table is
Subaddress Data Buffers.
identifies illegal commands.
address space, this RAM is
allocated into subaddress
Defines terminal behavior
Base Address Register.
Illegalization Table.
for valid commands:
how data is stored,
host interrupts, etc.
data buffers by the
Descriptor Table.
Descriptor Table.
Host-Allocated
256 Words
512 Words
Expanded
at Right
FIGURE 1. Address Mapping for Registers and RAM
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
he
8
A
RAM memory. All RAM is read-write
read by either the host or the internal device logic.
Some memory locations (specifically Descriptor Table
Control Words) contain bits updated by both host and
device. These locations are protected against accidental
data collision by device arbitration logic which acts when
concurrent writes by both host and device occur.
ddresses in the range 0x0020 to 0x7FFF apply to static
0x00FF
0x005F
0x003F
0x001F
0x0060
0x0040
0x0020
0x0000
Temporary Receive Data Buffer.
Registers (listed on next page)
can be assigned by the host.
This space in shared RAM
Interrupt Log Data Buffer.
Unallocated Memory.
32 Locations
160 Words
32 Words
32 Words
and can be written or
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