m28f410 STMicroelectronics, m28f410 Datasheet - Page 25
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m28f410
Manufacturer Part Number
m28f410
Description
4 Megabit X8 Or X16, Block Erase Flash Memory
Manufacturer
STMicroelectronics
Datasheet
1.M28F410.pdf
(38 pages)
Table 21. Word/Byte Program, Erase Times
(T
Table 22. Word/Byte Program, Erase Times
(T
DEVICE OPERATION (cont’d)
E Chip Enable. The Chip Enable activates the
memory control logic, input buffers, decoders and
sense amplifiers. E High de-selects the memory
and reduces the power consumption to the standby
level. E can also be used to control writing to the
command register and to the memory array, while
W remains at a low level. Both addresses and data
inputs are then latched on the rising edge of E.
RP Reset/Power Down. This is a tri-level input
which locks the Boot Block from programming and
erasure, and allows the memory to be put in deep
power down.
When RP is High (up to 6.5V maximum) the Boot
Block is locked and cannot be programmed or
erased. When RP is above 11.4V the Boot Block is
unlockedfor programming or erasure. With RP Low
the memory is in deep power down, and if RP is
within V
sorbed.
G Output Enable. The Output Enable gates the
outputs through the data buffers during a read
operation.
Main Block Program (Byte)
Main Block Program (Word)
Boot or Parameter Block Erase
Main Block Erase
Main Block Program (Byte)
Main Block Program (Word)
Boot or Parameter Block Erase
Main Block Erase
A
A
= 0 to 70°C; V
= –40 to 85°C or –40 to 125°C; V
SS
+0.2V the lowest supply current is ab-
Parameter
Parameter
CC
= 5V ± 10% or 5V ± 5%)
CC
= 5V ± 10% or 5V ± 5%)
Test Conditions
Test Conditions
V
V
V
V
V
V
V
V
PP
PP
PP
PP
PP
PP
PP
PP
= 12V ±5%
= 12V ±5%
= 12V ±5%
= 12V ±5%
= 12V ±5%
= 12V ±5%
= 12V ±5%
= 12V ±5%
W Write Enable. It controls writing to the Com-
mand Reg ister and Input Address and Data
latches. Both Addresses and Data Inputs are
latched on the rising edge of W.
BYTE Byte/Word Organization Select. This input
selects either byte-wide or word-wide organization
of the memory. When BYTE is Low the memory is
organized x8 or byte-wide and data input/output
uses DQ0-DQ7 while A-1 acts as the additional,
LSB, of the memory address that multiplexes the
upper or lower byte. In the byte-wide organization
DQ8-DQ14 are high impedance. When BYTE is
High the memory is organized x16 and data in-
put/output uses DQ0-DQ15 with the memory ad-
dressed by A0-A17.
V
is used for memory Programming and Erase.
V
tion requiring maximum 100 write and erase cycles.
V
V
measurements.
PP
PP
CC
SS
Program Supply Voltage. This supply voltage
±10% tolerance option is provided for applica-
Supply Voltage. It is the main circuit supply.
Ground. It is the reference for all voltage
Min
Min
M28F410 / 420
M28F410 / 420
Typ
Typ
1.2
0.6
2.4
1.4
0.7
1.5
1
3
Max
Max
10.5
4.2
2.1
2.5
14
18
7
5
Unit
Unit
sec
sec
sec
sec
sec
sec
sec
sec
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