m28f410 STMicroelectronics, m28f410 Datasheet - Page 4

• Manufacturer Part Number: m28f410
• Description: 4 Megabit X8 Or X16, Block Erase Flash Memory
• Manufacturer: STMicroelectronics

Table 5. Instructions
Notes: 1. X = Don’t Care.
Table 6. Commands
Blocks
Erasure of the memories is in blocks. There are 7
blocks in the memory address space, one Boot
Block of 16K Bytes or 8K Words, two ’Key Parame-
ter Blocks’ of 8K Bytes or 4K Words, one ’Main
4/38
monic
CLRS
RSIG
Mne-
RSR
RD
PG
ER
EE
ES
Hex Code
0D0h
2. The first cycle of the RD, RSR or RSIG instruction is followed by read operations to read memory array, Status Register
3. Signature address bit A0=V
4. When word organization is used, upper byte is don’t care for command input.
0B0h
0FFh
00h
10h
20h
40h
50h
70h
90h
or Electronic Signature codes. Any number of Read cycle can occur after one command cycle.
ignored.
Read
Memory
Array
Read
Status
Register
Read
Electronic
Signature
Erase
Program
Clear
Status
Register
Erase
Suspend
Erase
Resume
Instruction
Invalid/Reserved
Alternative Program Set-up
Erase Set-up
Program Set-up
Clear Status Register
Read Status Register
Read Electronic Signature
Erase Suspend
Erase Resume/Erase Confirm
Read Array
Cycles
1+
1+
3
2
2
1
1
1
Command
IL
will output Manufacturer code. Address bit A0=V
Operation
Write
Write
Write
Write
Write
Write
Write
Write
Address
1st Cycle
X
X
X
X
X
X
X
X
(1)
Block’ of 96K Bytes or 48K Words, and three ’Main
Blocks’of 128KBytes or 64K Words. The M28F410
memory has the Boot Block at the top of the mem-
ory address space (3FFFFh) and the M28F420
locates the Boot Block starting at the bottom
(00000h). Erasure of each block takes typically 1
second and each block can be programmed and
erased over 100,000 cycles.
The Boot Block is hardware protected from acci-
dental programming or erasure depending on the
RP signal. Program/Erase commands in the Boot
Block are executed only when RP is at 12V. Block
erasure may be suspended while data is read from
other blocks of the memory, then resumed.
Bus Operations
Six operationscan be performed by the appropriate
bus cycles, Read Byte or Word from the Array,
Read Electronic Signature, Output Disable,
Standby, Power Down and Write the Command of
an Instruction.
Command Interface
Commands can be written to a Command Interface
(C.I.) latch to perform read, programming, erasure
and to monitor the memory’s status. When power
40h or 10h
Data
0D0h
0FFh
0B0h
70h
90h
20h
50h
(4)
IH
will output Device code. Other address bits are
Operation
Read
Read
Read
Write
Write
(2)
(2)
(2)
2nd Cycle
Signature
Adress
Address
Address
Address
Address
Block
Read
X
(3)
Data Input
Signature
Register
Status
Data
0D0h
Data