cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 18
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cn8223
Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8223.pdf
(161 pages)
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1.0 Product Description
1.4 ATM Cell Processing Functions
1-8
1.4 ATM Cell Processing Functions
Figure 1-3
received octet data from the line framers into ATM cells. During transmit, this
block constructs ATM cells for the line transmitter circuits. The ATM cell
processing block can generate or receive either the 57-octet framed PLCPs or the
53-octet direct-mapped formats. Status indications include 16-bit counters for
PLCP OOF or Loss-of-Cell (LOC) delineation events, framing-octet errors, and
BIP-8 code violations for both the near and far end. All alarm indications are
provided and can be programmed to generate interrupts.
Figure 1-3. CN8223 Cell Processing Block
CN8223 cell processing block features include the following:
• Selectable HEC or PLCP alignment
• HEC calculation for ATM or SMDS
• HEC correction
• HEC Coset generation
• PLCP overhead control
• PLCP events and alarms control
• AAL3/4 CRC and length check support
• SONET scrambling
• ATM payload scrambling
• Error insertion
Line Framers
illustrates the CN8223 cell processing block, which assembles
Block
Conexant
Transmit G.832
Receive G.832
and PLCP
and PLCP
Framer
Framer
ATM Transmitter/Receiver with UTOPIA Interface
and Priority
Generation,
Rx VPI/VCI
Screening
Validation
Tx Rate
Rx Cell
Tx Cell
FIFO/UTOPIA
Ports Block
100046D
CN8223
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