cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 30

• Manufacturer Part Number: cn8223
• Description: Atm Transmitter/receiver With Utopia Interface
• Manufacturer: Mindspeed Technologies

1.0 Product Description
1.10 Pin Definitions
Table 1-2. Hardware Signal Definitions (1 of 5)
1-20
RXCKI
RXCKI_HS–
RXCKI_HS+
RXIN_HS–
RXIN_HS+
RXIN[0]
RXIN[1]
RXIN[2]
RXIN[3]
RXIN[4]
RXIN[5]
RXIN[6]
RXIN[7]
RXIN[8]
TXCKI
TXCKI_HS–
TXCKI_HS+
TXIN
TCLKO
TXOUT[0]
TXOUT[1]
TXOUT[2]
TXOUT[3]
TXOUT[4]
TXOUT[5]
TXOUT[6]
TXOUT[7]
TXOUT[8]
TCLKO_HS+
TCLKO_HS–
TXOUT_HS+
TXOUT_HS–
LOCD
Pin Label
Receive Clock
Input
Receive Clock
Input
Receive Serial
Input
Receive Input
Transmit Clock
Input
Transmit Clock
Input
Transmit Inputs
Transmit Clock
Output
Transmit Output
Transmit Clock Out
Transmit Serial Out
Loss of Cell
Delineation
Signal Name
No.
154
155
122
10
11
12
20
21
15
16
17
18
19
22
25
30
23
24
32
31
33
34
35
36
42
43
56
57
58
28
29
38
39
Conexant
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
PECL
PECL
PECL
PECL
PECL
PECL
PECL
PECL
PECL
PECL
Type
ATM Transmitter/Receiver with UTOPIA Interface
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Receive clock for all line rates except STS-3c,
STM-1, and E4.
Differential PECL level for high-speed modes.
Receive clock for STS-3c, STM-1, and E4. Tie to
+5 V if not used.
Differential PECL level for high-speed modes.
Serial data in for STS-3c, STM-1, and E4. Tie to
+5 V if not used.
Receive parallel and TAXI mode data inputs. Tie
to a logic low level if not used.
Transmit clock for all modes except STS-3c,
STM-1, and E4.
Differential PECL level for high-speed modes.
Transmit clock for STS-3c, STM-1, and E4. Tie to
+5 V if not used.
Transmit serial data input for all modes except
STS-3c, STM-1, and E4.
Transmit clock output for all modes except
STS-3c, STM-1, and E4.
Transmit parallel and TAXI mode data outputs.
Differential PECL level. Transmit clock output for
STS-3c, STM-1, and E4.
Differential PECL level. Transmit serial data
output for STS-3c, STM-1, and E4.
Asserted when cell synchronization is lost.
Definition
100046D
CN8223