cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 68
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cn8223
Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8223.pdf
(161 pages)
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2.0 Functional Description
2.6 ATM Cell Processing
2-34
can be disabled via the Overhead Control bits. The fields of the G1 octet are
under control of the All 0s FEBE [bit 14], All 1s FEBE [bit 13], and Transmit
Alarm Control [bits 9–4] of CONFIG_2. The FEBE controls operate as shown in
Table
Table 2-21. FEBE Controls
Alarm Control [bit 7].
Force Cycle Stuffing [bit 6] of CONFIG_3 [0x02], and Overhead Control [bits
3–0] of CONFIG_2 [0x01] as shown in
Table 2-22. C1 Octet
nibble set to 1100 unless Overhead Control [bit 0] is set. In this case, each nibble
has the value 0000.
only overhead present is that contained in the line framing format, as discussed in
Section
This capability can be used to verify far-end FEBE operation. BIP generation
The yellow alarm bit in the G1 octet is set to the value contained in Transmit
The C1 octet is under control of PHY Type [bits 2–0] of CONFIG_1 [0x00],
The trailer content (except in E1 mode where there is no trailer) has each
In 53-octet formats, no PLCP overhead is associated with each ATM cell. The
Generation
Disable C1
2-21.
All 1s FEBE
2.2.
1
0
0
0
0
0
1
1
Conexant
PHY Type
DS1, E1
DS3, E3
DS3, E3
x
ATM Transmitter/Receiver with UTOPIA Interface
All 0s FEBE
Force Cycle
0
1
0
1
Stuffing
Table
0
1
x
x
2-22.
Per Selected 8 kHz Reference
(Via CONFIG_1, Bit 11)
BIP-8 Errors Received
Per Default Cycle
C1 Octet Value
FEBE Field Value
00
00
0000
1111
0000
100046D
CN8223
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