cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 26

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cn8223

Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet

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1.0 Product Description
1.8 CN8223 Applications
Figure 1-10. CN8223 Connected to TDK 78P7200
1.8.1 CN8223 as a DS3 or E3 G.751 Framer without ATM Cell Delineation
1-16
Layer
ATM
Cells
TDK 78P7200 T3 LIU. Unused pins on the CN8223 must be tied as follows:
unused RXIN_8:0 pins tie to ground, PECL inputs RXCKI_HS±, RXIN_HS±,
and TXCKI_HS± tie to +5 V.
The CN8223 can be used as a DS3 or an E3 G.751 framer with parallel input and
serial output by making the following changes:
received on pin 56, TXOUT[6]. The receive clock is derived from the LIU device.
Data is transmitted through the parallel UTOPIA interface.
Figure 1-10
• Set the configuration registers for transparent operation.
• Disable the parallel interface.
• Disable line loopback.
In this setup, the receive frame sync pulse is on pin 43, TXOUT[5]. Data is
Pin
31
35
34
10
17
16
19
30
CN8223
TXOUT[2]
TXOUT[1]
RXIN[2]
RXIN[1]
RXIN[4]
TCLKO
RXCKI
TXCKI
illustrates an example implementation of the CN8223 using a
System Clock
(44.736 MHz)
Conexant
Signal
ATM Transmitter/Receiver with UTOPIA Interface
TCLK
TNEG
TPOS
RCLK
RNEG
RPOS
LOWSIG
TDK 78P7200
Pin
27
15
14
23
24
25
27
Tx
Rx
100046D
CN8223

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