cx28380 Mindspeed Technologies, cx28380 Datasheet - Page 20

• Manufacturer Part Number: cx28380
• Description: Cn8380 Quad T1/e1 Line Interface
• Manufacturer: Mindspeed Technologies

2.2
2.2.1
In Hardware Mode, the device is controlled using dedicated hardware control pins. In this mode, the four channels
are configured globally to identical operating modes (T1, E1, transmit termination, jitter attenuators, and so on).
Each channel has device pins dedicated for channel control and status, such as loopback controls and loss of
signal indicators. See
Mode is selected by pulling the HM pin high.
2.2.2
In Host Mode, control of the device is through a four-line serial port. In this mode, all control and status functions
can be accessed using internal registers. See
by grounding the HM pin.
2.2.3
The CX28380 serial interface is a four-wire, slave interface which allows a host processor or framer with a
compatible master serial port to communicate with the LIU. This interface allows the host to control and query the
CX28380 status by writing and reading internal registers. One 8-bit register in the LIU can be written via the SDI
pin or read from the SDO pin at the clock rate determined by SCLK. The serial port is enabled by pulling the chip
select pin, CS , active (low) during the read and write cycles. See
The serial interface uses a 16-bit process for each write or read operation. During a write or read operation, an 8-bit
control word, consisting of a read/write control bit
(R/W) and a 7-bit LIU register address (A[6:0]) is transmitted to the LIU using the SDI pin. If the operation is a write
operation (R/W = 0), an 8-bit register data (D[7:0]) byte follows the address on the SDI pin. This data is received by
the CX28380 and stored in the addressed register. If the operation is a read operation (R/W = 1), the CX28380
outputs the addressed register contents on the SDO pin. The signal input on SDI is sampled on the SCLK rising
edge, and data output on SDO changes on the SCLK falling edge.
29380-DSH-001-B
Configuration and Control
Hardware Mode
Host Mode
Host Serial Control Interface
Table 1-1, Hardware Signal
Preliminary Information / Mindspeed Proprietary and Confidential
Mindspeed Technologies
Chapter
Definitions, for a description of all hardware pins. Hardware
3, for a description of each register. Host Mode is selected
Figure 2-2
®
for host serial port signals.
Circuit Description
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