lxt975 Intel Corporation, lxt975 Datasheet - Page 42

• Manufacturer Part Number: lxt975
• Description: Fast Ethernet 10/100 Quad Transceivers
• Manufacturer: Intel Corporation

LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
3.1.5
3.1.6
3.1.7
42
The RBIAS Pin
The LXT974/975 requires a 22 k Ω, 1% resistor directly connected between the RBIAS pin and
ground. Place the RBIAS resistor as close to the RBIAS pin as possible. Run an etch directly from
the pin to the resistor, and sink the other side of the resistor to a filtered ground. Surround the
RBIAS trace with a filtered ground; do not run high-speed signals next to RBIAS.
The Twisted-Pair Interface
Because the LXT974/975 transmitter uses 2:1 magnetics, system designers must take extra
precautions to minimize parasitic shunt capacitance in order to meet return loss specifications.
These steps include:
In addition, follow all the standard guidelines for a twisted-pair interface:
The Fiber Interface
The fiber interface consists of a PECL transmit and receive pair to an external fiber-optic
transceiver. The transmit pair should be AC-coupled to the transceiver, and biased to 3.7V with a
50 Ω equivalent impedance. The receive pair can be DC-coupled, and should be biased to 3.0V
with a 50 Ω equivalent impedance.
these requirements.
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Use compensating inductor in the output stage (see
Place the magnetics as close as possible to the LXT974/975.
Keep transmit pair traces short.
Route the transmit pair adjacent to a ground plane. The optimum arrangement is to place the
transmit traces two to three layers from the ground plane, with no intervening signals.
Some magnetic vendors are producing magnetics with improved return loss performance. Use
of these improved magnetics increases the return loss budget available to the system designer.
Improve EMI performance by filtering the output center tap. A single ferrite bead may be used
to supply center tap current to all 4 ports. All four ports draw a combined total of ≥ 270 mA so
the bead should be rated at ≥ 400 mA.
Route the signal pairs differentially, close together. Allow nothing to come between them.
Keep distances as short as possible; both traces should have the same length.
Avoid vias and layer changes as much as possible.
Keep the transmit and receive pairs apart to avoid cross-talk.
Put all the components for the transmit network on the front side of the board (same side as the
LXT974/975).
Put entire receive termination network on the back side of the board.
Bypass common-mode noise to ground on the in-board side of the magnetics using 0.01 µ F
capacitors.
Keep termination circuits close together and on the same side of the board.
Always put termination circuits close to the source end of any circuit.
Figure 24 on page 48
shows the correct bias networks to achieve
Figure 23 on page
47).
Datasheet