74AUP2G00DC,125 NXP Semiconductors, 74AUP2G00DC,125 Datasheet - Page 16
![IC NAND GATE DL 2IN 8-VSSOP](/photos/6/94/69485/8-vssop_sot765-1_sml.jpg)
74AUP2G00DC,125
Manufacturer Part Number
74AUP2G00DC,125
Description
IC NAND GATE DL 2IN 8-VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP2G00DC125.pdf
(21 pages)
Specifications of 74AUP2G00DC,125
Number Of Circuits
2
Package / Case
US8, 8-VSSOP
Logic Type
NAND Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
20.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G00DC-G
74AUP2G00DC-G
935280706125
74AUP2G00DC-G
935280706125
NXP Semiconductors
Fig 15. Package outline SOT1116 (XSON8)
74AUP2G00
Product data sheet
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.2 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1116
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
e
(8×)
1.25
1.20
1.15
D
L
(2)
1
1.05
1.00
0.95
E
0.55
1
8
JEDEC
e
All information provided in this document is subject to legal disclaimers.
e
1
0.3
e
2
7
1
References
e
Rev. 5 — 21 October 2010
D
0.35
0.30
0.27
1
0
L
3
6
0.40
0.35
0.32
L
e
1
1
JEITA
b
4
5
scale
0.5
A
E
L
1
A
1 mm
(4×)
Low-power dual 2-input NAND gate
(2)
European
projection
74AUP2G00
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-07
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