74AUP2G00DC,125 NXP Semiconductors, 74AUP2G00DC,125 Datasheet - Page 8
![IC NAND GATE DL 2IN 8-VSSOP](/photos/6/94/69485/8-vssop_sot765-1_sml.jpg)
74AUP2G00DC,125
Manufacturer Part Number
74AUP2G00DC,125
Description
IC NAND GATE DL 2IN 8-VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP2G00DC125.pdf
(21 pages)
Specifications of 74AUP2G00DC,125
Number Of Circuits
2
Package / Case
US8, 8-VSSOP
Logic Type
NAND Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
20.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G00DC-G
74AUP2G00DC-G
935280706125
74AUP2G00DC-G
935280706125
NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
74AUP2G00
Product data sheet
Symbol Parameter
C
t
C
t
C
t
C
t
pd
pd
pd
pd
L
L
L
L
= 5 pF
= 10 pF
= 15 pF
= 30 pF
propagation delay nA, nB to nY; see
propagation delay nA, nB to nY; see
propagation delay nA, nB to nY; see
propagation delay nA, nB to nY; see
Dynamic characteristics
Conditions
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
All information provided in this document is subject to legal disclaimers.
Figure 8
Figure 8
Figure 8
Figure 8
Rev. 5 — 21 October 2010
[2]
[2]
[2]
[2]
Figure
Min
2.5
2.0
1.6
1.3
1.0
2.4
2.4
2.0
1.4
1.3
3.4
2.8
2.0
1.7
1.6
4.6
3.0
2.6
2.4
2.3
-
-
-
-
T
amb
Typ
9.
17.5
21.0
24.5
34.8
5.3
3.8
3.1
2.5
2.2
6.1
4.4
3.7
3.0
2.8
6.9
5.0
4.1
3.5
3.2
9.2
6.5
5.4
4.6
4.3
= 25 °C
[1]
Max
13.0
14.8
20.1
11.0
11.8
6.8
5.3
4.0
3.6
7.9
6.2
4.7
4.3
8.9
7.0
5.3
4.9
9.3
7.1
6.5
Low-power dual 2-input NAND gate
-
-
-
-
T
Min
2.1
1.8
1.4
1.1
1.0
2.2
2.2
1.9
1.3
1.2
3.1
2.5
2.0
1.5
1.4
4.1
2.9
2.3
2.1
2.1
amb
-
-
-
-
= −40 °C to +125 °C
74AUP2G00
(85 °C)
Max
12.2
14.4
16.5
10.5
22.6
14.0
11.1
7.8
6.2
4.7
4.2
9.2
7.3
5.6
4.9
8.3
6.4
5.7
8.5
7.6
-
-
-
-
© NXP B.V. 2010. All rights reserved.
(125 °C)
Max
13.5
15.9
10.2
18.2
11.6
24.9
15.4
12.3
8.6
6.9
5.2
4.7
8.1
6.2
5.4
9.2
7.1
6.3
9.4
8.4
-
-
-
-
8 of 21
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns