ssd1329 ETC-unknow, ssd1329 Datasheet - Page 17

no-image

ssd1329

Manufacturer Part Number
ssd1329
Description
128 X 128 Oled Segment / Common Driver With Controller Equips With 16 Gray Scale Levels And 64 Hard Icon Lines
Manufacturer
ETC-unknow
Datasheet
8.1.2 MPU Parallel 8080-series Interface
The parallel interface consists of 8 bi-directional data pins (D[7:0]), RD#, WR#, D/C# and CS#.
A LOW in D/C# indicates COMMAND read/write and HIGH in D/C# indicates DATA read/write.
A rising edge of RD# input serves as a data READ latch signal while CS# is kept LOW.
A rising edge of WR# input serves as a data/command WRITE latch signal while CS# is kept LOW.
Note
(1)
In order to match the operating frequency of display RAM with that of the microprocessor, some pipeline
processing is internally performed which requires the insertion of a dummy read before the first actual display
data read. This is shown in Figure 8-2.
Alternatively, RD# and WR# can be keep stable while CS# serves as the data/command latch signal.
Note
(1)
Databus
SSD1329
WR#
RD#
H stands for HIGH in signal
L stands for LOW in signal
H stands for HIGH in signal
L stands for LOW in signal
↑ stands for rising edge of signal
↑ stands for rising edge of signal
Rev 1.1
Figure 8-2 : Display data read back procedure - insertion of dummy read
Write column
address
Table 8-3 : Control pins of 8080 interface (Alternative form)
N
P 17/58
Function
Write command
Read status
Write data
Read data
Function
Write command
Read status
Write data
Read data
Table 8-2 : Control pins of 8080 interface
Dec 2005
Dummy
read
RD#
H
H
RD#
L
H
L
H
WR#
H
H
Read 1
WR#
L
H
L
H
n
st
CS#
L
L
L
L
data
CS#
D/C#
L
L
H
H
D/C#
L
L
H
H
Read 2
n+1
nd
data
Solomon Systech
Read 3
n+2
rd
data

Related parts for ssd1329