ssd1908 Solomon Systech Limited:, ssd1908 Datasheet - Page 164

• Manufacturer Part Number: ssd1908
• Description: Lcd Drivers,lcd Controllers
• Manufacturer: Solomon Systech Limited:

23.3 Register Table
Solomon Systech
Register
Read-Only Configuration Registers
REG[01h] Display Buffer Size Register
REG[02h] Configuration Readback Register
REG[03h] Product / Revision Code Register
Clock Configuration Registers
REG[04h] Memory Clock Configuration Register
REG[05h] Pixel Clock Configuration Register
Look-Up Table Registers
REG[08h] Look-Up Table Blue Write Data Register
REG[09h] Look-Up Table Green Write Data Register
REG[0Ah] Look-Up Table Red Write Data Register
REG[0Bh] Look-Up Table Write Address Register
REG[0Ch] Look-Up Table Blue Read Data Register
REG[0Dh] Look-Up Table Green Read Data Register
REG[0Eh] Look-Up Table Red Read Data Register
REG[0Fh] Look-Up Table Read Address Register
Panel Configuration Registers
REG[10h] Panel Type Register
REG[11h] MOD Rate Register
REG[12h] Horizontal Total Register
REG[14h] Horizontal Display Period Register
REG[16h] Horizontal Display Period Start Position Register 0
REG[17h] Horizontal Display Period Start Position Register 1
REG[18h] Vertical Total Register 0
REG[19h] Vertical Total Register 1
REG[1Ch] Vertical Display Period Register 0
REG[1Dh] Vertical Display Period Register 1
REG[1Eh] Vertical Display Period Start Position Register 0
REG[1Fh] Vertical Display Period Start Position Register 1
REG[20h] LLINE Pulse Width Register
REG[22h] LLINE Pulse Start Position Register 0
REG[23h] LLINE Pulse Start Position Register 1
REG[24h] LFRAME Pulse Width Register
REG[26h] LFRAME Pulse Start Position Register 0
REG[27h] LFRAME Pulse Start Position Register 1
REG[30h] LFRAME Pulse Start Offset Register 0
REG[31h] LFRAME Pulse Start Offset Register 1
REG[34h] LFRAME Pulse Stop Offset Register 0
REG[35h] LFRAME Pulse Stop Offset Register 1
REG[38h] HR-TFT Special Output Register
REG[3Ah] GPIO1 Pulse Start Register
REG[3Bh] GPIO1 Pulse Stop Register
REG[3Ch] GPIO0 / LDEN Pulse Start Register
REG[3Eh] GPIO0 / LDEN Pulse Stop Register
REG[40h] GPIO2 Pulse Delay Register
REG[42h] Analog TFT Control Register
REG[45h] STN Color Depth Control Register
REG[50h] Dynamic Dithering Control Register
Display Mode Registers
REG[70h] Display Mode Register
REG[71h] Special Effects Register
Main Window Registers
REG[74h] Main Window Display Start Address Register 0
REG[75h] Main Window Display Start Address Register 1
REG[76h] Main Window Display Start Address Register 2
REG[78h] Main Window Line Address Offset Register 0
REG[79h] Main Window Line Address Offset Register 1
Table 23-1 : SSD1908 Register Table (1 of 3)
Oct 2003
P 154/154 Rev 1.0
Pg
18
18
19
19
19
20
21
21
22
22
22
23
23
24
25
25
26
26
26
26
27
27
27
28
28
28
29
29
29
30
30
30
30
31
31
31
32
32
33
33
34
35
36
36
37
38
40
40
40
41
41
SSD1908