gl850g Genesys Logic, gl850g Datasheet - Page 18

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gl850g

Manufacturer Part Number
gl850g
Description
Gl850g Usb 2.0 Low-power Hub Controller
Manufacturer
Genesys Logic
Datasheet

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5.2 Configuration and I/O Settings
©2000-2008 Genesys Logic Inc. - All rights reserved.
DSPORT (downstream port) logic implements the control logic defined in section 11.5 of USB specification
Revision 2.0 . It mainly manipulates the state machine, the connection/disconnection detection, over current
detection and power enable control, and the status LED control of the downstream port. Besides, it also
output the control signals to the DSPORT transceiver.
DSPORT transceiver is the analog circuit that supports high-speed, full-speed, and low-speed electrical
characteristics defined in chapter 7 of USB specification Revision 2.0 . In addition, each DSPORT
transceiver accurately controls its own squelch level to detect the detachment and attachment of devices.
external reset pin, RESETJ, is connected to upstream port Vbus (5V) to sense the USB plug / unplug or 5V
voltage drop. The reset trigger voltage can be set by adjusting the value of resistor R1 and R2 (Suggested
value refers to schematics) GL858’s internal reset is designed to monitor silicon’s internal core power (3.3V)
and initiate reset when unstable power event occurs. The power on sequence will start after the power good
voltage has been met, and the reset will be released after approximately 2.7 nS after power good.
5.12 DSPORT logic
5.13 DSPORT Transceiver
5.2.1 RESET Setting
HS vs. HS:
Traffic channel is
routed to REPEATER
GL858’s power on reset can either be triggered by external reset or internal power good reset circuit. The
DSPORT operating
in HS signaling
Figure 5.2 – Operating in USB 2.0 scheme
REPEATER
GL850G USB 2.0 Low-Power HUB Controller
USB2.0 HOST/HUB
TT
USPORToperating
in HS signaling
DSPORT operating
in FS/LS signaling
HS vs. FS/LS:
Traffic channel
is routed to TT
Page 18

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