BS85B12-3 HOLTEK [Holtek Semiconductor Inc], BS85B12-3 Datasheet - Page 127

• Manufacturer Part Number: BS85B12-3
• Description: Touch Key Flash Type 8-Bit MCU with LCD/LED Driver
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

BS85B12-3/BS85C20-3
Touch Key Flash MCU with LCD/LED Driver
Rev. 1.00
Bit 7
Bit 6
Bit 5~0
Bit 7~1
Bit 0
Name
Name
Name
POR
POR
POR
R/W
R/W
R/W
Bit
Bit
Bit
I2CTOC Register
SIMD Register
SIMA Register
I2CTOEN
The SIMD register is used to store the data being transmitted and received. The same register is used
by both the SPI and I
transmitted must be placed in the SIMD register. After the data is received from the I
vice can read it from the SIMD register. Any transmission or reception of data from the I
be made via the SIMD register.
IICA6
R/W
R/W
R/W
D7
I2CTOEN: I
I2CTOF: Time-out flag
I2CTOS5~I2CTOS0: Time-Out Time Definition
I
I
IICA6~ IICA0: I
IICA6~ IICA0 is the I
The SIMA register is also used by the SPI interface but has the name SIMC2. The SIMA
register is the location where the 7-bit slave address of the slave device is stored. Bits 7~1 of the
SIMA register define the device slave address. Bit 0 is not defined.
When a master device, which is connected to the I
matches the slave address in the SIMA register, the slave device will be selected. Note that the
SIMA register is the same register address as SIMC2 which is used by the SPI interface.
Undefined bit
This bit can be read or written by user software program.
7
0
7
7
2
2
x
x
0: disable
1: enable
0: no time-out
1: time-out occurred
C time-out clock source is f
C Time-Out time is given by: [I2CTOS5 : I2CTOS0]+1) x (32/f
I2CTOF
IICA5
2
R/W
R/W
R/W
C Time-out Control
D6
6
0
6
x
6
x
2
C slave address
2
C functions. Before the device writes data to the I
2
C slave address bit 6~bit 0.
I2CTOS5
IICA4
R/W
R/W
R/W
D5
5
0
5
x
5
x
LIRC
/32.
I2CTOS4
IICA3
R/W
R/W
R/W
121
D4
4
0
4
4
x
x
I2CTOS3
IICA2
R/W
R/W
R/W
2
D3
C bus, sends out an address, which
3
0
3
3
x
x
I2CTOS2
LIRC
IICA1
R/W
R/W
R/W
D2
2
0
2
x
2
x
)
2
C bus, the actual data to be
I2CTOS1
IICA0
R/W
R/W
R/W
D1
1
0
1
x
1
x
February 1, 2011
2
C bus, the de-
2
I2CTOS0
C bus must
x unknown
x unknown
R/W
R/W
R/W
D0
D0
0
0
0
0
x
x