BS85B12-3 HOLTEK [Holtek Semiconductor Inc], BS85B12-3 Datasheet - Page 147

• Manufacturer Part Number: BS85B12-3
• Description: Touch Key Flash Type 8-Bit MCU with LCD/LED Driver
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

BS85B12-3/BS85C20-3
Touch Key Flash MCU with LCD/LED Driver
Rev. 1.00
Name
R/W
POR
Bit 7~6
Bit 5
Bit
Bit 3
Bit 2~0
LVD Operation
Bit
LVDC Register
The Low Voltage Detector function operates by comparing the power supply voltage, V
pre-specified voltage level stored in the LVDC register. This has a range of between 2.0V and 4.2V.
When the power supply voltage, V
high indicating a low power supply voltage condition. The Low Voltage Detector function is supplied
by a reference voltage which will be automatically enabled. When the device is powered down the low
voltage detector will remain active if the LVDEN bit is high. After enabling the Low Voltage Detector,
a time delay t
that as the V
multiple bit LVDO transitions.
The Low Voltage Detector also has its own interrupt which is contained within one of the
Multi-function interrupts, providing an alternative means of low voltage detection, in addition to
polling the LVDO bit. The interrupt will only be generated after a delay of t
been set high by a low voltage condition. When the device is powered down the Low Voltage Detector
will remain active if the LVDEN bit is high. In this case, the LVF interrupt request flag will be set,
causing an interrupt to be generated if V
device to wake-up from the SLEEP or IDLE Mode, however if the Low Voltage Detector wake up
function is not required then the LVF flag should be first set high before the device enters the SLEEP or
IDLE Mode.
unimplemented, read as 0
LVDO: LVD Output Flag
LVDEN: Low Voltage Detector Control
unimplemented, read as 0
VLVD2 ~ VLVD0: Select LVD Voltage
7
0: No Low Voltage Detect
1: Low Voltage Detect
0: Disable
1: Enable
000: 2.0V
001: 2.2V
010: 2.4V
011: 2.7V
100: 3.0V
101: 3.3V
110: 3.6V
111: 4.2V
DD
LVDS
voltage may rise and fall rather slowly, at the voltage nears that of V
6
should be allowed for the circuitry to stabilise before reading the LVDO bit. Note also
LVD Operation
LVDO
R
5
0
DD
, falls below this pre-determined value, the LVDO bit will be set
LVDEN
R/W
141
DD
4
0
falls below the preset LVD voltage. This will cause the
3
VLVD2
R/W
2
0
LVD
VLVD1
after the LVDO bit has
R/W
1
0
February 1, 2011
LVD
, there may be
VLVD0
DD
R/W
, with a
0
0