BS85B12-3 HOLTEK [Holtek Semiconductor Inc], BS85B12-3 Datasheet - Page 95

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BS85B12-3

Manufacturer Part Number
BS85B12-3
Description
Touch Key Flash Type 8-Bit MCU with LCD/LED Driver
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
BS85B12-3/BS85C20-3
Touch Key Flash MCU with LCD/LED Driver
Rev. 1.00
Bit 3
Bit 2
Bit 1~0
Bit 7~0
Bit 7~2
Bit 7~0
Name
Name
POR
POR
R/W
R/W
Bit
Bit
Name
POR
R/W
Bit
TM1DL Register -- 10-bit ETM
D7
TM1DH Register -- 10-bit ETM
TM1AL Register -- 10-bit ETM
T1BOC: TP1B_0, TP1B_1, TP1B_2 Output control bit
This is the output control bit for the TM output pin. Its operation depends upon whether TM is
being used in the Compare Match Output Mode or in the PWM Mode/ Single Pulse Output Mode.
It has no effect if the TM is in the Timer/Counter Mode. In the Compare Match Output Mode it
determines the logic level of the TM output pin before a compare match occurs. In the PWM
Mode it determines if the PWM signal is active high or active low.
T1BPOL: TP1B_0, TP1B_1, TB1B_2 Output polarity Control
This bit controls the polarity of the TP1B_0, TP1B_1, TP1B_2 output pin. When the bit is set
high the TM output pin will be inverted and not inverted when the bit is zero. It has no effect if the
TM is in the Timer/Counter Mode.
T1PWM1~T1PWM0: Select PWM Mode
TM1DL: TM1 Counter Low Byte Register bit 7~bit 0
TM1 10-bit Counter bit 7~bit 0
Unimplemented, read as 0
Bit 1~0
TM1AL: TM1 Low Byte Register bit 7~bit 0
TM1 10-bit CCRA bit 7~bit 0
R
7
0
7
R/W
0: Non-invert
1: Invert
00: Edge aligned
01: Centre aligned, compare match on count up
10: Centre aligned, compare match on count down
11: Centre aligned, compare match on count up or down
D7
7
0
Compare Match Output Mode
TM1DH: TM1 Counter High Byte Register bit 1~bit 0
TM1 10-bit Counter bit 9~bit 8
Mode/ Single Pulse Output Mode
0: Initial low
1: Initial high
0: Active low
1: Active high
D6
R
6
0
6
R/W
D6
6
0
D5
R
R/W
5
0
5
D5
5
0
D4
89
R/W
R
4
0
4
D4
4
0
D3
R/W
R
3
0
3
D3
3
0
D2
R/W
R
D2
2
0
2
2
0
R/W
D1
D9
D1
R
R
1
0
1
0
1
0
February 1, 2011
R/W
D0
D8
D0
R
R
0
0
0
0
0
0

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