BS85B12-3 HOLTEK [Holtek Semiconductor Inc], BS85B12-3 Datasheet - Page 79

• Manufacturer Part Number: BS85B12-3
• Description: Touch Key Flash Type 8-Bit MCU with LCD/LED Driver
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

BS85B12-3/BS85C20-3
Touch Key Flash MCU with LCD/LED Driver
Rev. 1.00
Bit 7
Bit 6~4
Bit 3
TM2DH
TM2C0
TM2C1
TM2DL
TM2AH
TM2AL
Name
Name
POR
R/W
Standard Type TM Register Description
Bit
STM Register List
TM2C0 Register
T2PAU
T2PAU
Overall operation of the Standard TM is controlled using a series of registers. A read only register pair
exists to store the internal counter 10-bit value, while a read/write register pair exists to store the
internal 10-bit CCRA value. The remaining two registers are control registers which setup the different
operating and control modes as well as the three CCRP bits.
T2M1
R/W
Bit7
D7
D7
T2PAU: TM2 Counter Pause Control
The counter can be paused by setting this bit high. Clearing the bit to zero restores normal
counter operation. When in a Pause condition the TM will remain powered up and continue to
consume power. The counter will retain its residual value when this bit changes from low to high
and resume counting from this value when the bit changes to a low value again.
T2CK2~T2CK0: Select TM2 Counter clock
These three bits are used to select the clock source for the TM. Selecting the Reserved clock
input will effectively disable the internal counter. The external pin clock source can be chosen to
be active on the rising or falling edge. The clock source f
f
T2ON: TM2 Counter On/Off Control
This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to
run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting
and turn off the TM which will reduce its power consumption. When the bit changes state from
low to high the internal counter value will be reset to zero, however when the bit changes from
high to low, the internal counter will retain its residual value until the bit returns high again.
If the TM is in the Compare Match Output Mode then the TM output pin will be reset to its initial
condition, as specified by the T2OC bit, when the T2ON bit changes from low to high.
7
0
TBC
0: run
1: pause
000: f
001: f
010: f
011: f
100: f
101: undefined
110: TCK2 rising edge clock
111: TCK2 falling edge clock
0: Off
1: On
are other internal clocks, the details of which can be found in the oscillator section.
H
SYS
SYS
H
TBC
/64
/16
/4
T2CK2
T2CK2
T2M0
Bit6
R/W
D6
D6
6
0
10-bit Standard TM Register List
T2CK1
T2CK1
T2IO1
Bit5
R/W
D5
D5
5
0
T2CK0
T2CK0
T2IO0
R/W
Bit4
D4
D4
73
4
0
T2ON
T2OC
T2ON
R/W
Bit3
D3
D3
3
0
SYS
is the system clock, while f
T2RP2
T2POL
T2RP2
Bit2
R/W
D2
D2
2
0
T2RP1
T2DPX
T2RP1
Bit1
R/W
D1
D9
D1
D9
1
0
February 1, 2011
H
T2CCLR
T2RP0
T2RP0
and
R/W
Bit0
D0
D8
D0
D8
0
0