C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 131

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C505_9708

Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Bit
LEC
Note :Reading the SR when an interrupt is pending, resets the pending interrupt request. (please
Semiconductor Group
see section 6.4.6 for further details about CAN interrupt handling.
Function
Last error code
This field holds a code which indicates the type of the last error occurred on the
CAN bus. If a message has been transferred (reception or transmission) without
error, this field will be cleared. Code “7” is unused and may be written by the
microcontroller to check for updates.
LEC2-0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
Error
No Error
Stuff Error
Form Error A fixed format part of a received frame has the
Ack Error
Bit1 Error
Bit0 Error
CRC Error The CRC check sum was incorrect in the message
Description
More than 5 equal bits in a sequence have occurred
in a part of a received message where this is not
allowed.
wrong format
The message this CAN controller transmitted was
not acknowledged by another node.
During the transmission of a message (with the
exception of the arbitration field), the device wanted
to send a recessive level (“1”), but the monitored bus
value was dominant .
During
acknowledge bit, active error flag, or overload flag),
the device wanted to send a dominant level (“0”), but
the monitored bus value was recessive. During
busoff recovery this status is set each time a
sequence of 11 recessive bits has been monitored.
This enables the microcontroller to monitor the
proceeding of the busoff recovery sequence
(indicating the bus is not stuck at dominant or
continously disturbed).
received.
6-69
the
On-Chip Peripheral Components
transmission
of
a
message
C505C Only
1997-08-01
(or

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