C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 150
C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
(227 pages)
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6.4.4 Initialization and Reset
The CAN controller is reset by a hardware reset, the oscillator watchdog reset or by a watchdog
timer reset of the C505C. A reset operation of the CAN controller performs the following actions :
The first hardware reset after power-on leaves the unchanged registers in an undefined state, of
course. The value 01 H in the control register’s low byte prepares for software initialization.
Software Initialization
The very first step of the initialization is the CAN controller input clock selection. A
enabled by default after reset (figure 6-39). Setting bit CMOD (SYSCON.3) disables the prescaler.
The purpose of the prescaler selection is:
i) to ensure that the CAN controller is operable when f osc is over 10 MHz (bit CMOD =0)
ii) to achieve the maximum CAN baudrate of 1 Mbaud when f osc is 8 MHz (bit CMOD=1)
Figure 6-39
CAN controller input clock selection
Semiconductor Group
.
– sets the TXDC output to “1” (recessive)
– clears the error counters
– resets the busoff state
– switches the control register’s low byte to 01 H
– leaves the control register’s high byte and the interrupt register undefined
– does not change the other registers including the message objects (notified as UUUU)
– selects the prescaler for the CAN controller clock using the bit CMOD in SYSCON register.
f
Condition: CMOD = 0, when
OSC
Frequency (MHz)
f
OSC
Note : The switch configuration shows the reset state of bit CMOD.
16
8
8
f
CAN
2
8
4
8
f
(SYSCON.3)
OSC
0
1
CMOD
SYSCON.3
> 10 MHz
(CMOD)
1
0
0
6-88
(BTR0.0-
000000 B
000000 B
000000 B
On-Chip Peripheral Components
BRP
f
CAN
5)
(Mbaud/sec)
baudrate
CAN
Full-CAN
0.5
Module
1
1
MCS03296
÷
C505C Only
2 prescaler is
1997-08-01
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