C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 196
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C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
(227 pages)
- Current page: 196 of 227
- Download datasheet (2Mb)
Fail Save Mechanisms
C505 / C505C
oscillator and the part is held in reset. This allows a reliable stabilization of the on chip oscillator.
After that, the watchdog switches the clock supply back to the on-chip oscillator and releases the
oscillator watchdog reset. If no other reset is applied at this time the part will start program
execution. If an external reset or a watchdog timer reset is active, however, the device will retain
the reset state until the other reset request disappears.
Furthermore, the status flag OWDS is set if the oscillator watchdog was active. The status flag can
be evaluated by software to detect that a reset was caused by the oscillator watchdog. The flag
OWDS can be set or cleared by software. An external reset request, however, also resets OWDS
(and WDTS).
If software power-down mode is activated the RC oscillator and the on-chip oscillator are stopped.
Both oscillators are again started in power-down mode when a low level is detected at either the
P3.2/INT0 input pin or the P4.1/RXDC pin and when bit EWPD in SFR PCON1 is set (wake-up from
power-down mode enabled). The wake-up source is chosen from one of P3.2/INT0 and P4.1/RXDC
by bit WS in SFR PCON1. In this case the oscillator watchdog does not execute an internal reset
during startup of the on-chip oscillator. After the start-up phase of the on-chip oscillator, the
watchdog generates a power-down mode wake-up interrupt. Detailed description of the wake-up
from software power-down mode is given in section 9.4.2.
Fast Internal Reset after Power-On
The C505 can use the oscillator watchdog unit for a fast internal reset procedure after power-on.
Normally the members of the 8051 family (e. g. SAB 80C52) do not enter their default reset state
before the on-chip oscillator starts. The reason is that the external reset signal must be internally
synchronized and processed in order to bring the device into the correct reset state. Especially if a
crystal is used the start up time of the oscillator is relatively long (typ. 1 ms). During this time period
the pins have an undefined state which could have severe effects e.g. to actuators connected to
port pins.
In the C505 the oscillator watchdog unit avoids this situation. After power-on the oscillator
watchdog's RC oscillator starts working within a very short start-up time (typ. less than
2 microseconds). Then the watchdog circuitry detects a failure condition for the on-chip oscillator
because this has not yet started (a failure is always recognized if the watchdog's RC oscillator runs
faster than the on-chip oscillator). As long as this condition is valid the watchdog uses the RC
oscillator output as clock source for the chip. This allows correct resetting of the part and brings all
ports to the defined state (see also chapter 5 of this manual).
Semiconductor Group
8-8
1997-08-01
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