LTC2421 LINER [Linear Technology], LTC2421 Datasheet - Page 11

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LTC2421

Manufacturer Part Number
LTC2421
Description
1-/2-Channel 20-Bit UPower No Latency ADCs in MSOP-10
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
Conversion Clock
A major advantage delta-sigma converters offer over con-
ventional type converters is an on-chip digital filter (com-
monly known as Sinc or Comb filter). For high resolution,
low frequency applications, this filter is typically designed
to reject line frequencies of 50Hz or 60Hz plus their har-
monics. In order to reject these frequencies in excess of
110dB, a highly accurate conversion clock is required. The
LTC2421/LTC2422 incorporate an on-chip highly accu-
rate oscillator. This eliminates the need for external fre-
quency setting components such as crystals or oscilla-
tors. Clocked by the on-chip oscillator, the LTC2421/
LTC2422 reject line frequencies (50Hz or 60Hz 2%) a
minimum of 110dB.
Ease of Use
The LTC2421/LTC2422 data output has no latency, filter
settling or redundant data associated with the conver-
sion cycle. There is a one-to-one correspondence be-
tween the conversion and the output data. Therefore,
multiplexing an analog input voltage is easy.
The LTC2421/LTC2422 perform offset and full-scale cali-
brations every conversion cycle. This calibration is trans-
parent to the user and has no effect on the cyclic operation
described above. The advantage of continuous calibration
is extreme stability of offset and full-scale readings with
respect to time, supply voltage change and temperature
drift.
Power-Up Sequence
The LTC2421/LTC2422 automatically enter an internal reset
state when the power supply voltage V
approximately 2.2V. This feature guarantees the integrity
of the conversion result and of the serial interface mode
selection which is performed at the initial power-up. (See
the 2-wire I/O sections in the Serial Interface Timing Modes
section.)
When the V
the converter creates an internal power-on-reset (POR)
signal with duration of approximately 0.5ms. The POR
signal clears all internal registers. Following the POR sig-
nal, the LTC2421/LTC2422 start a normal conversion cycle
and follows the normal succession of states described
CC
voltage rises above this critical threshold,
U
U
W
CC
drops below
U
above. The first conversion result following POR is accu-
rate within the specifications of the device.
Reference Voltage Range
The LTC2421/LTC2422 can accept a reference voltage (V
= FS
noise is determined by the thermal noise of the front-end
circuits, and as such, its value in microvolts is nearly con-
stant with reference voltage. A decrease in reference volt-
age will not significantly improve the converter’s effective
resolution. On the other hand, a reduced reference voltage
will improve the overall converter INL performance. The
recommended range for the LTC2421/LTC2422 voltage
reference is 100mV to V
Input Voltage Range
The converter is able to accommodate system level offset
and gain errors as well as system level overrange situa-
tions due to its extended input range, see Figure 3. The
LTC2421/LTC2422 convert input signals within the ex-
tended input range of – 0.125 • V
(V
For large values of V
is limited by the absolute maximum voltage range of
– 0.3V to (V
protection devices begin to turn on and the errors due to
the input leakage current increase rapidly.
Input signals applied to V
– 300mV and above V
ZS
FS
REF
SET
SET
SET
+ 0.12V
– 0.12V
V
= FS
CC
+ 0.3V
– ZS
FS
ZS
–0.3V
REF
SET
SET
REF
SET
Figure 3. LTC2421/LTC2422 Input Range
CC
SET
(V
– ZS
+ 0.3V). Beyond this range, the input ESD
REF
) from 0V to V
= FS
NORMAL
RANGE
INPUT
SET
REF
SET
CC
).
– ZS
(V
LTC2421/LTC2422
CC
by 300mV. In order to limit any
IN
REF
SET
EXTENDED
.
RANGE
INPUT
may extend below ground by
)
= FS
CC
SET
. The converter output
REF
ABSOLUTE
MAXIMUM
– ZS
RANGE
INPUT
24212 F03
to 1.125 • V
SET
), this range
11
24212f
REF
REF

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