LTC2421 LINER [Linear Technology], LTC2421 Datasheet - Page 30
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LTC2421
Manufacturer Part Number
LTC2421
Description
1-/2-Channel 20-Bit UPower No Latency ADCs in MSOP-10
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC2421.pdf
(32 pages)
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APPLICATIO S I FOR ATIO
LTC2421/LTC2422
Below 4.2V, the LTC1535’s driver outputs Y and Z are in a
high impedance state, allowing the 1k pull-down to de-
fine the logic state at SCK. When the LTC2422 first be-
comes active, it samples SCK; a logic “0” provided by the
1k pull-down invokes the external serial clock mode. In
this mode, the LTC2422 is controlled by a single clock line
from the nonisolated side of the barrier, through the
LTC1535’s driver output Y. The entire power-up sequence,
30
LOGIC 5V
“SDO”
“SCK”
U
1
U
TANT
10 F
10V
RO
RE
DE
DI
+
V
ST1
Figure 36. Complete, Isolated 20-Bit Data Acquisition System
CC1
1
W
T1
ISOLATION
ST2
G1
BARRIER
1
G2
LTC1535
1/2 BAT54C
1/2 BAT54C
2
U
T1 = COILTRONICS CTX02-14659
1
2
= LOGIC COMMON
= FLOATING COMMON
OR SIEMENS B78304-A1477-A3
+
V
CC2
10 F
16V
TANT
1 F
A
B
Y
Z
from the time power is applied to V
output has reached 5V, is approximately 1ms.
Data returns to the nonisolated side through the LTC1535’s
receiver at RO. An internal divider on receiver input B sets
a logic threshold of approximately 3.4V at input A, facili-
tating communications with the LTC2422’s SDO output
without the need for any external components.
IN
SHDN
LT1761-5
+
GND
2
2
2
1k
OUT
BYP
10 F
10V
TANT
2
10 F
F
SCK
SDO
CS
GND
O
LTC2422
+
FS
ZS
CH1
CH0
V
SET
SET
10 F
10V
TANT
CC
CERAMIC
10 F
CC1
2
until the LT1761’s
24212 F36
24212f