LTC2421 LINER [Linear Technology], LTC2421 Datasheet - Page 8

• Manufacturer Part Number: LTC2421
• Description: 1-/2-Channel 20-Bit UPower No Latency ADCs in MSOP-10
• Manufacturer: LINER [Linear Technology]

PIN
LTC2421/LTC2422
TYPICAL PERFOR A CE CHARACTERISTICS
V
(Pin 6) with a 10 F tantalum capacitor in parallel with
0.1 F ceramic capacitor as close to the part as possible.
FS
full-scale input value. When V
full scale (FFFFF
FS
CH0, CH1 (Pins 4, 3): Analog Input Channels. The input
voltage range is – 0.125 • V
V
absolute maximum rating of – 0.3V to V
sions are performed alternately between CH0
and CH1 for the LTC2422. Pin 4 is a No Connect (NC) on
the LTC2421.
ZS
zero-scale input value. When V
outputs zero scale (00000
GND (Pin 6): Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
8
CC
REF
SET
SET
SET
U
20
18
16
14
12
10
(Pin 1): Positive Supply Voltage. Bypass to GND
> 2.5V, the input voltage range may be limited by the
0
INL vs Output Rate
V
V
F
– ZS
(Pin 5): Zero-Scale Set Input. This pin defines the
(Pin 2): Full-Scale Set Input. This pin defines the
FUNCTIONS
O
CC
REF
10 20 30
= EXTERNAL
= 5V
= 5V
U
SET
T
A
.
OUTPUT RATE (Hz)
= –45 C
40
T
A
H
= 25 C
50 60 70 80 90 100
). The total reference voltage is
U
H
T
W
A
).
= 90 C
IN
REF
24212 G28
= FS
U
IN
to 1.125 • V
SET
= ZS
CC
, the ADC outputs
+ 0.3V. Conver-
SET
12
20
18
16
14
10
, the ADC
0
INL vs Output Rate
V
V
F
T
O
CC
REF
A
REF
10 20 30
= EXTERNAL
= 25 C
= 3V
= 2.5V
T
A
. For
= –45 C
OUTPUT RATE (Hz)
40
50 60 70 80 90 100
be connected directly to a ground plane through a mini-
mum length trace or it should be the single-point-ground
in a single-point grounding system.
CS (Pin 7): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW on CS wakes up the ADC. A
LOW-to-HIGH transition on this pin disables the SDO
digital output. A LOW-to-HIGH transition on CS during the
Data Output transfer aborts the data transfer and starts a
new conversion.
SDO (Pin 8): Three-State Digital Output. During the data
output period, this pin is used for serial data output. When
the chip select CS is HIGH (CS = V
high impedance state. During the Conversion and Sleep
periods, this pin can be used as a conversion status out-
put. The conversion status can be observed by pulling CS
LOW.
T
A
= 90 C
24212 G29
24
22
20
18
16
0 7.5
Resolution vs Output Rate
V
V
f
STANDARD DEVIATION
OF 100 SAMPLES
O
CC
REF
= EXTERNAL
= 5V
= 5V
25
CC
OUTPUT RATE (Hz)
), the SDO pin is in a
50
75
T
T
T
A
A
A
= 25 C
= 90 C
= –45 C
24212 G30
24212f
100