AD598 Analog Devices, AD598 Datasheet - Page 6

• Manufacturer Part Number: AD598
• Description: LVDT Signal Conditioner
• Manufacturer: Analog Devices

AD598
DESIGN PROCEDURE
DUAL SUPPLY OPERATION
Figure 7 shows the connection method with dual 15 volt power
supplies and a Schaevitz E100 LVDT. This design procedure
can be used to select component values for other LVDTs as
well. The procedure is outlined in Steps 1 through 10 as follows:
1. Determine the mechanical bandwidth required for LVDT
2. Select minimum LVDT excitation frequency, approximately
3. Select a suitable LVDT that will operate with an excitation
4. Determine the sum of LVDT secondary voltages V
5. Determine optimum LVDT excitation voltage, V
position measurement subsystem, f
example, assume f
10 f
frequency of 2.5 kHz. The Schaevitz E100, for instance, will
operate over a range of 50 Hz to 10 kHz and is an eligible
candidate for this example.
Energize the LVDT at its typical drive level V
the manufacturer’s data sheet (3 V rms for the E100). Set the
core displacement to its center position where V
sure these values and compute their sum V
E100, V
later in determining AD598 output voltage.
the LVDT energized at its typical drive level V
core displacement to its mechanical full-scale position and
measure the output V
the largest signal. Compute LVDT voltage transformation
ratio, VTR.
For the E100, V
VTR = 1.75.
SUBSYSTEM
A
+V
B
= 2.70 V rms. This calculation will be used
. Therefore, let excitation frequency = 2.5 kHz.
SEC
SCHAEVITZ E100
SUBSYSTEM
–15V
+
= 1.71 V rms for V
15V
LVDT
SEC
VTR = V
6.8 F
of whichever secondary produces
= 250 Hz.
Figure 7. Interconnection Diagram for Dual Supply Operation
PRI
V
V
A
B
C2
C1
/V
R1
SUBSYSTEM
0.1 F
SEC
PRI
= 3 V rms.
10
A
2
3
4
5
6
7
8
9
1
+V
. For this
EXC 1
EXC 2
LEV 1
LEV 2
FREQ 1
FREQ 2
B1 FILT
B2 FILT
PRI
–V
V
PRI
B
B
S
A
. For the
as shown in
EXC
, set the
= V
AD598
A
. With
and V
FEEDBACK
B
. Mea-
OFFSET 2
OFFSET 1
OUT FILT
SIG OUT
SIG REF
A1 FILT
A2 FILT
B
.
+V
V
A
–6–
S
6.8 F
16
13
12
20
19
18
17
15
14
11
6. Referring to Figure 7, for V
7. Select excitation frequency determining component C1.
R4
R3
The AD598 signal input, V
1 V rms to 3.5 V rms for maximum AD598 linearity and
minimum noise susceptibility. Select V
fore, LVDT excitation voltage V
Check the power supply voltages by verifying that the peak
values of V
ages at +V
amplitude determining component R1 as shown by the curve
in Figure 8.
30
20
10
0
0.01
R2
C4
C3
0.1 F
Figure 8. Excitation Voltage V
V
EXC
S
A
SIGNAL
REFERENCE
V
and –V
OUT
and V
0.1
= V
NOTE
FOR C1, C2, C3 AND C4 MYLAR
CAPACITORS ARE
RECOMMENDED. CERAMIC
CAPACITORS MAY BE
SUBSTITUTED. FOR R2, R3 AND
R4 USE STANDARD 1%
RESISTORS.
C1 = 35 F Hz/f
R
SEC
B
L
S
.
are at least 2.5 volts less than the volt-
VTR = 3
1
SEC
S
R1 – k
= 15 V, select the value of the
, should be in the range of
EXCITATION
EXC
1.75 = 5.25 V rms
10
should be:
SEC
EXC
= 3 V rms. There-
vs. R1
100
V
rms
REV. A
1000