UPD70208HGF-16-3B9 NEC, UPD70208HGF-16-3B9 Datasheet - Page 64

• Manufacturer Part Number: UPD70208HGF-16-3B9
• Description: V40HLTM/ V50HLTM 16/8/ 16-BIT MICROPROCESSOR
• Manufacturer: NEC

Instruc-
tion
Group
Notes 1.
BRK
BRKV
RETI
BRKEM
CHKIND
Mnemonic
2.
3.
4.
When V = 1: 52
When V = 0: 3
When V = 1: 40/52
When V = 0: 3
When interrupt condition is established
When interrupt condition is not established
When interrupt condition is established
When interrupt condition is not established
3
imm8
( = 3)
imm8
reg16, mem32
Operand(s)
7 6 5 4 3 2 1 0
1 1 0 0 1 1 0 0
1 1 0 0 1 1 0 1
1 1 0 0 1 1 1 0
1 1 0 0 1 1 1 1
0 0 0 0 1 1 1 1
0 1 1 0 0 0 1 0
Operation Code
7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1
mod reg mem
: (52 to 55)/(72 to 75)
: 72 to 75
: 25
: 17/25
Bytes
2-4
1
2
1
1
3
V40HL V50HL
Note 1
Note 3
Clock Cycles
50
50
39
50
38/50
38/50
Note 2
27/39
38/50
Note 4
TA
SP
SP
SP
TA
SP
SP
SP
If V = 1
TA
SP
SP
SP
PC
PSW
TA
SP
MD is set to write enabled
SP
SP
If (mem32) > reg16 or (mem32 + 2) < reg16
TA
SP
SP
SP
(00DH, 00CH), TC
(4 n + 1, 4n), TC
(011H, 010H), TC
(4 n + 1, 4n), TC
(015H, 014H), TC
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
(SP + 1, SP), PS
(SP + 5, SP + 4), SP
Operation
(4n + 3, 4n + 2) n = imm8
(4n + 3, 4n + 2) n = imm8
(013H, 012H)
(SP + 3, SP + 2),
(017H, 016H)
(00FH, 00EH)
PSW, IE
PS, PS
PC, PC
PSW, IE
PS, PS
PC, PC
PSW, IE
PS, PS
PC, PC
PSW, MD
PS, PS
PC, PC
PSW, IE
PS, PS
PC, PC
SP + 6
TC
TC
TC
TC
TC
TA
TA
TA
TA
TA
0, BRK
0, BRK
0, BRK
0, BRK
0
0
0
0
0
AC CY V
R R R R R R
Flags
P
S
Z