S29GL128S SPANSION [SPANSION], S29GL128S Datasheet - Page 39

• Manufacturer Part Number: S29GL128S
• Manufacturer: SPANSION [SPANSION]

March 16, 2012 S29GL_128S_01GS_00_06
5.4.2.1
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Algorithm is in progress or
has completed. Data# Polling is valid after the rising edge of the final WE# pulse in the program or erase
command sequence. Note that the Data# Polling is valid only for the last word being programmed in the write-
buffer-page during Write Buffer Programming. Reading Data# Polling status on any word other than the last
word to be programmed in the write-buffer-page will return false status information.
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the data bit
programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the
Embedded Program algorithm is complete, the device outputs the data bit programmed to bit 7 of the last
word programmed. In case of a Program Suspend, the device allows only reading array data. If a program
address falls within a protected sector, Data# Polling on DQ7 is active for approximately 20 µs, then the
device returns to reading array data.
During the Embedded Erase or blank check algorithms, Data# Polling produces a 0 on DQ7. When the
algorithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a 1 on DQ7.
This is analogous to the complement / true datum output described for the Embedded Program algorithm: the
erase function changes all the bits in a sector to 1; prior to this, the device outputs the complement or '0'. The
system must provide an address within the sector selected for erasure to read valid status information on
DQ7.
After an erase command sequence is written, if the sector selected for erasing is protected, Data# Polling on
DQ7 is active for approximately 100 µs, then the device returns to reading array data.
When the system detects DQ7 has changed from the complement to true data, it can read valid data at
DQ15-DQ0 on the following read cycles. This is because DQ7 may change asynchronously with DQ6-DQ0
while Output Enable (OE#) is asserted Low. This is illustrated in
on page 42
algorithm use in Write Buffer Programming.
Valid DQ7 data polling status may only be read from:
 the address of the last word loaded into the Write Buffer for a Write Buffer programming operation;
 the location of a single word programming operation;
 or a location in a sector being erased or blank checked.
Note:
1. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.
shows the outputs for Data# polling on DQ7.
D a t a
GL-S MirrorBit
S h e e t
Figure 5.5 Data# Polling Algorithm
No
Read DQ 7 -DQ0
Read DQ7 -DQ0
®
DQ7 = Data?
DQ7 = Data?
DQ5 = 1?
Family
START
FAIL
No
No
Yes
-
Figure 5.2 on page 29
Yes
Yes
Figure 10.16 on page
PASS
shows the Data# polling
88.
Table 5.3
39