S29GL128S SPANSION [SPANSION], S29GL128S Datasheet - Page 40

• Manufacturer Part Number: S29GL128S
• Manufacturer: SPANSION [SPANSION]

40
5.4.2.2
5.4.2.3
5.4.2.4
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device has entered the Program Suspend or Erase Suspend mode. Toggle Bit I may be read
at any address, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the
program or erase operation).
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. (The system may use either OE# or CE# to control the read cycles). When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if the sector selected for erasing is protected, DQ6 toggles for
approximately 100 µs, then the EAC returns to standby (read mode). If the selected sector is not protected,
the Embedded Erase algorithm erases the unprotected sector.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Program Suspend mode or Erase Suspend mode, DQ6 stops toggling.
However, the system must also use DQ2 to determine which sectors are erasing, or erase-suspended.
Alternatively, the system can use DQ7 (see
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
algorithm is complete.
Table 5.3 on page 42
algorithm in flowchart form, and the
Figure 5.6 on page 41
between DQ2 and DQ6 in graphical form. See also
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the system may read DQ3 to determine whether or not
erasure has begun. See
After the sector erase command is written, the system should read the status of DQ7 (Data# Polling) or DQ6
(Toggle Bit I) to ensure that the device has accepted the command sequence, and then read DQ3. If DQ3 is
1, the Embedded Erase algorithm has begun; all further commands (except Erase Suspend) are ignored until
the erase operation is complete.
bits.
DQ2: Toggle Bit II
Toggle Bit II on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that is,
the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within the sector selected for erasure. (The system may
use either OE# or CE# to control the read cycles). But DQ2 cannot distinguish whether the sector is actively
erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is actively erasing, or is in
Erase Suspend, but cannot distinguish if the sector is selected for erasure. Thus, both status bits are required
for sector and mode information. Refer to
Figure 5.5 on page 39
DQ2 on page 41
Figure 5.2 on page 29
explains the algorithm. See also
shows the outputs for Toggle Bit I on DQ6.
shows the toggle bit timing diagrams.
shows the toggle bit algorithm in flowchart form, and the
shows the differences between DQ2 and DQ6 in graphical form.
Sector Erase on page 33
Table 5.3 on page 42
GL-S MirrorBit
Reading Toggle Bits DQ6/DQ2 on page 41
Table 5.3 on page 42
DQ7: Data# Polling on page
D a t a
®
Figure 5.6 on page 41
Family
for more details.
DQ2: Toggle Bit II on page
shows the status of DQ3 relative to the other status
S h e e t
Figure 5.2 on page 29
to compare outputs for DQ2 and DQ6.
Figure 5.6 on page 41
S29GL_128S_01GS_00_06 March 16, 2012
shows the toggle bit timing diagram.
39).
40.
Reading Toggle Bits DQ6/
explains the algorithm.
shows the differences
shows the toggle bit