S29PL-J SPANSION [SPANSION], S29PL-J Datasheet - Page 22

• Manufacturer Part Number: S29PL-J
• Description: CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
• Manufacturer: SPANSION [SPANSION]

10. Device Bus Operations
10.1
20
Requirements for Reading Array Data
This section describes the requirements and use of the device bus operations, which are initiated through the
internal command register. The command register itself does not occupy any addressable memory location.
The register is a latch used to store the commands, along with the address and data information needed to
execute the command. The contents of the register serve as inputs to the internal state machine. The state
machine outputs dictate the function of the device.
control levels they require, and the resulting output. The following subsections describe each of these
operations in further detail.
Legend:
L = Logic Low = V
= Data In, D
Notes
1. The sector protect and sector unprotect functions may also be implemented via programming equipment. See
2. WP#/ACC must be high when writing to upper two and lower two sectors.
To read array data from the outputs, the system must drive the OE# and appropriate CE# pins (For PL129J -
CE1#/CE2# pins) to V
upper (CE2#) halves of the device. CE# is the power control. OE# is the output control and gates array data
to the output pins. WE# should remain at V
The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory content occurs during the power transition. No command is
necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses
on the device address inputs produce valid data on the device data outputs. Each bank remains enabled for
read access until the command register contents are altered.
Refer to
diagram. I
data.
Read
Write
Standby
Output Disable
Reset
Temporary Sector Unprotect
(High Voltage)
Read
Write
Standby
Output Disable
Reset
Temporary Sector Unprotect
(High Voltage)
Protection on page
Table 21.3 on page 84
OUT
Operation
CC1
Operation
= Data Out
IL
in the DC Characteristics table represents the active current specification for reading array
, H = Logic High = V
48.
IL
D a t a
. In PL129J, CE1# and CE2# are the power control and select the lower (CE1#) or
V
IO
IH
CE#
for timing specifications and to
±0.3 V
, V
Table 10.1 PL127J Device Bus Operations
Table 10.2 PL129J Device Bus Operations
L
L
L
X
X
CE1#
0.3 V
S h e e t
V
ID
H
H
IO
X
X
L
L
L
±
= 11.5–12.5 V, V
CE2#
S29PL-J
V
0.3 V
OE#
H
X
H
X
X
IO
L
H
H
X
X
L
L
L
IH
±
.
( A d v a n c e
WE#
OE#
HH
H
H
H
X
H
X
X
L
X
X
X
L
Table 10.1
= 8.5–9.5 V, X = Don’t Care, SA = Sector Address, A
WE#
V
H
X
H
X
X
L
RESET#
IO
V
±0.3 V
H
H
H
L
ID
lists the device bus operations, the inputs and
RESET#
Figure 20.3 on page 74
I n f o r m a t i o n )
V
0.3 V
V
IO
H
H
H
L
ID
±
WP#/ACC
X
X
(Note 2)
(Note 2)
S29PL-J_00_A9 September 22, 2006
X
X
X
X
WP#/ACC
(Note 2)
X
X
X
X
X
X
(Amax–A0)
Addresses
Addresses
for the timing
High Voltage Sector
(A21–A0)
A
A
A
X
X
X
IN
IN
IN
A
A
A
X
X
X
IN
IN
IN
IN
= Address In, D
DQ15–
High-Z
High-Z
High-Z
DQ15–
High-Z
High-Z
High-Z
D
DQ0
D
D
D
DQ0
OUT
D
D
OUT
IN
IN
IN
IN
IN