S29PL-J SPANSION [SPANSION], S29PL-J Datasheet - Page 60

• Manufacturer Part Number: S29PL-J
• Description: CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
• Manufacturer: SPANSION [SPANSION]

15.6
58
Chip Erase Command Sequence
Note
See
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical erase. The system is not required to provide any
controls or timings during these operations.
for the chip erase command sequence.
When the Embedded Erase algorithm is complete, that bank returns to the read mode and addresses are no
longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, DQ2, or RY/
BY#. Refer to
Any commands written during the chip erase operation are ignored. Note that Secured Silicon Sector,
autoselect, and CFI functions are unavailable when a [program/erase] operation is in progress. However,
note that a hardware reset immediately terminates the erase operation. If that occurs, the chip erase
command sequence should be reinitiated once that bank has returned to reading array data, to ensure data
integrity.
Figure 15.2 on page 59
Operations on page 76
Table 15.1 on page 62
Write Operation Status on page 64
for program command sequence.
D a t a
for parameters, and
illustrates the algorithm for the erase operation. Refer to the tables in
Increment Address
S h e e t
Figure 15.1 Program Operation
S29PL-J
Embedded
in progress
Table 15.1 on page 62
algorithm
Program
Figure 20.8 on page 78
( A d v a n c e
for information on these status bits.
No
Command Sequence
Write Program
Last Address?
Programming
from System
Verify Data?
Completed
Data Poll
START
I n f o r m a t i o n )
shows the address and data requirements
Yes
Yes
for timing diagrams.
S29PL-J_00_A9 September 22, 2006
No
Erase/Program