S29PL-N SPANSION [SPANSION], S29PL-N Datasheet - Page 43

• Manufacturer Part Number: S29PL-N
• Description: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

P r e l i m i n a r y
successive read cycles, determining the status as described in the previous paragraph. Alterna-
tively, it can choose to perform other system tasks. In this case, the system must start at the
beginning of the algorithm when it returns to determine the status of the operation. Refer to
Figure 7.4, Write Operation Status Flowchart
for more details.
DQ5 indicates whether the program or erase time has exceeded
DQ5: Exceeded Timing Limits.
a specified internal pulse count limit. Under these conditions DQ5 produces a 1, indicating that
the program or erase cycle was not successfully completed. The device may output a 1 on DQ5 if
the system tries to program a 1 to a location that was previously programmed to 0. Only an erase
operation can change a 0 back to a 1, Under this condition, the device halts the operation, and
when the timing limit has been exceeded, DQ5 produces a 1. Under both these conditions, the
system must write the reset command to return to the read mode (or to the erase-suspend-read
mode if a bank was previously in the erase-suspend-program mode).
After writing a sector erase command sequence,
DQ3: Sector Erase Timeout State Indicator.
the system may read DQ3 to determine whether or not erasure has begun. (The sector erase
timer does not apply to the chip erase command.) If additional sectors are selected for erasure,
the entire time-out also applies after each additional sector erase command. When the time-out
period is complete, DQ3 switches from a 0 to a 1. If the time between additional sector erase
commands from the system can be assumed to be less than t
, the system need not monitor
SEA
DQ3. See Sector Erase Command Sequence for more details.
After the sector erase command is written, the system should read the status of DQ7 (Data# Poll-
ing) or DQ6 (Toggle Bit I) to ensure that the device has accepted the command sequence, and
then read DQ3. If DQ3 is 1, the Embedded Erase algorithm has begun; all further commands (ex-
cept Erase Suspend) are ignored until the erase operation is complete. If DQ3 is 0, the device
accepts additional sector erase commands. To ensure the command has been accepted, the sys-
tem software should check the status of DQ3 prior to and following each sub-sequent sector erase
command. If DQ3 is high on the second status check, the last command might not have been
accepted.
Table 7.18
shows the status of DQ3 relative to the other status bits.
DQ1 indicates whether a Write to Buffer operation was aborted.
DQ1: Write to Buffer Abort.
Under these conditions DQ1 produces a 1. The system must issue the Write to Buffer Abort Reset
command sequence to return the device to reading array data. See Write Buffer Programming
Operation for more details.
November 23, 2005 S29PL-N_00_A4
S29PL-N MirrorBit™ Flash Family
41