CY7C0851V CYPRESS [Cypress Semiconductor], CY7C0851V Datasheet - Page 22

• Manufacturer Part Number: CY7C0851V
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Document Number: 38-06070 Rev. *L
Note
43. CE
(labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
INTERNAL
ADDRESS
ADDRESS
CNTEN
0
DATA
= B0 – B3 = R/W = LOW; CE
ADS
DATA
ADDRESS
CLK
DATA
IN
OUT
CLK
R/W
OE
CE
t
t
SCN
t
t
SAD
SA
SD
IN
WRITE EXTERNAL
D
A
DISABLED
n
n
ADDRESS
t
CH2
1
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be completed
t
CYC2
t
t
(continued)
t
t
HAD
HCN
t
SA
t
HA
HD
SC
t
CL2
t
CL2
A
t
Figure 15. Disabled to Read-to-Read to Read-to-Write
SW
n
Figure 14. Write with Address Counter Advance
t
CYC2
A
n
D
t
HW
n+1
t
CH2
READ
WRITE WITH
t
t
COUNTER
HC
HA
A
n+1
D
t
CD2
n+1
WRITE COUNTER
A
n+1
READ
HOLD
Q
n
A
n+2
D
n+2
READ
Q
n+1
t
SA
t
SW
A
CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
n+2
t
[43]
SD
WRITE WITH COUNTER
A
D
n+3
D
n+3
n+3
t
HD
WRITE
t
t
HA
HW
A
n+3
D
A
n+4
n+4
READ
A
Page 22 of 39
n+4
Q
n+2